PIC18F452-I/L Microchip Technology Inc., PIC18F452-I/L Datasheet - Page 55

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PIC18F452-I/L

Manufacturer Part Number
PIC18F452-I/L
Description
44 PIN, 32 KB FLASH, 1536 RAM, 34 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F452-I/L

A/d Inputs
8-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
256 Bytes
Input Output
36
Interface
I2C/SPI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
44-pin PLCC
Programmable Memory
32K Bytes
Ram Size
1.5K Bytes
Speed
40 MHz
Timers
1-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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4.14
The Reset Control (RCON) register contains flag bits
that allow differentiation between the sources of a
device RESET. These flags include the TO, PD, POR,
BOR and RI bits. This register is readable and writable.
REGISTER 4-3:
© 2006 Microchip Technology Inc.
RCON Register
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
RCON REGISTER
bit 7
IPEN: Interrupt Priority Enable bit
1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupts (16CXXX Compatibility mode)
Unimplemented: Read as '0'
RI: RESET Instruction Flag bit
1 = The RESET instruction was not executed
0 = The RESET instruction was executed causing a device RESET
TO: Watchdog Time-out Flag bit
1 = After power-up, CLRWDT instruction, or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down Detection Flag bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
POR: Power-on Reset Status bit
1 = A Power-on Reset has not occurred
0 = A Power-on Reset occurred
BOR: Brown-out Reset Status bit
1 = A Brown-out Reset has not occurred
0 = A Brown-out Reset occurred
Legend:
R = Readable bit
- n = Value at POR
R/W-0
IPEN
(must be set in software after a Brown-out Reset occurs)
(must be set in software after a Power-on Reset occurs)
(must be set in software after a Brown-out Reset occurs)
U-0
U-0
W = Writable bit
’1’ = Bit is set
R/W-1
RI
Note 1: If the BOREN configuration bit is set
2: It is recommended that the POR bit be set
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
(Brown-out Reset enabled), the BOR bit is
’1’ on a Power-on Reset. After a Brown-
out Reset has occurred, the BOR bit will
be cleared, and must be set by firmware to
indicate the occurrence of the next
Brown-out Reset.
after a Power-on Reset has been
detected, so that subsequent Power-on
Resets may be detected.
R-1
TO
R-1
PD
PIC18FXX2
x = Bit is unknown
R/W-0
POR
DS39564C-page 53
R/W-0
BOR
bit 0

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