PIC16F690-E/P Microchip Technology Inc., PIC16F690-E/P Datasheet - Page 35

• Manufacturer Part Number: PIC16F690-E/P
• Description: 20 PIN, 7 KB FLASH, 256 RAM, 18 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F690-E/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 7 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 18
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

TABLE 2-2:
© 2006 Microchip Technology Inc.
Addr
Bank 1
80h
81h
82h
83h
84h
85h
86h
87h
88h
89h
8Ah
8Bh
8Ch
8Dh
8Eh
8Fh
90h
91h
92h
93h
93h
94h
95h
96h
97h
98h
99h
9Ah
9Bh
9Ch
9Dh
9Eh
9Fh
Legend:
Note
INDF
OPTION_REG
PCL
STATUS
FSR
TRISA
TRISB
TRISC
PCLATH
INTCON
PIE1
PIE2
PCON
OSCCON
OSCTUNE
PR2
SSPADD
SSPMSK
SSPSTAT
WPUA
IOCA
WDTCON
TXSTA
SPBRG
SPBRGH
BAUDCTL
ADRESL
ADCON1
1:
2:
3:
4:
5:
6:
7:
Name
(3)
—
—
—
—
—
(6)
– = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented
MCLR and WDT Reset do not affect the previous value data latch. The RABIF bit will be cleared upon Reset but will set again if the
mismatch exists.
PIC16F687/PIC16F689/PIC16F690 only.
PIC16F685/PIC16F690 only.
PIC16F677/PIC16F685/PIC16F687/PIC16F689/PIC16F690 only.
PIC16F677/PIC16F687/PIC16F689/PIC16F690 only.
RA3 pull-up is enabled when pin is configured as MCLR in Configuration Word.
Accessible only when SSPCON register bits SSPM<3:0> = 1001.
(2)
(2)
(5, 7)
(4)
(5, 7)
(4)
(2)
(5)
(2)
PIC16F631/677/685/687/689/690 SPECIAL FUNCTION REGISTERS SUMMARY BANK 1
Unimplemented
Unimplemented
Unimplemented
Timer2 Period Register
Synchronous Serial Port (I
Unimplemented
Unimplemented
A/D Result Register Low Byte
Addressing this location uses contents of FSR to address data memory (not a physical register)
Program Counter’s (PC) Least Significant Byte
Indirect Data Memory Address Pointer
ABDOVF
RABPU
TRISB7
TRISC7
BRG15
OSFIE
CSRC
MSK7
BRG7
Bit 7
SMP
GIE
IRP
—
—
—
—
—
—
—
—
—
—
INTEDG
TRISB6
TRISC6
ADCS2
ADIE
BRG14
RCIDL
IRCF2
MSK6
BRG6
Bit 6
PEIE
C2IE
CKE
RP1
TX9
—
—
—
—
—
—
—
(4)
PIC16F631/677/685/687/689/690
ULPWUE SBOREN
TRISA5
TRISB5
TRISC5
WPUA5
RCIE
BRG13
ADCS1
IOCA5
IRCF1
MSK5
BRG5
T0CS
TXEN
C1IE
2
Bit 5
T0IE
RP0
D/A
C mode) Address Register
—
—
—
—
(2)
Write Buffer for the upper 5 bits of the Program Counter
WDTPS3
TRISC4
WPUA4
TRISA4
TRISB4
TXIE
BRG12
ADCS0
IOCA4
IRCF0
MSK4
SYNC
BRG4
SCKP
T0SE
TUN4
Bit 4
INTE
EEIE
TO
P
Preliminary
(2)
WDTPS2
SSPIE
TRISC3
TRISA3
SENDB
BRG11
BRG16
RABIE
IOCA3
OSTS
MSK3
BRG3
TUN3
Bit 3
PSA
PD
—
—
—
—
—
S
(5)
CCP1IE
WDTPS1
TRISA2
TRISC2
WPUA2
BRG10
IOCA2
BRGH
TUN2
MSK2
BRG2
Bit 2
T0IF
HTS
R/W
PS2
—
—
—
—
—
Z
(3)
TMR2IE
WDTPS0
TRISA1
TRISC1
WPUA1
IOCA1
MSK1
TRMT
BRG1
BRG9
TUN1
WUE
Bit 1
INTF
POR
PS1
LTS
DC
UA
—
—
—
(3)
SWDTEN
RABIF
TRISA0
TRISC0
TMR1IE
WPUA0
ABDEN
IOCA0
MSK0
BRG0
BRG8
TUN0
TX9D
Bit 0
BOR
SCS
PS0
BF
—
—
—
C
(1)
xxxx xxxx
1111 1111
0000 0000
0001 1xxx
xxxx xxxx
--11 1111
1111 ----
1111 1111
---0 0000
0000 000x
-000 0000
0000 ----
--01 --qq
-110 q000
---0 0000
1111 1111
0000 0000
1111 1111
0000 0000
--11 -111
--00 0000
---0 1000
0000 0010
0000 0000
0000 0000
01-0 0-00
xxxx xxxx
-000 ----
POR, BOR
Value on
—
—
—
—
—
DS41262C-page 33
184,202
187,202
176,202
209,202
158,202
161,202
161,202
160,202
115,202
114,202
44,201
37,201
44,201
36,201
44,201
59,201
70,202
76,201
44,201
38,201
39,202
40,202
43,202
48,202
52,202
91,202
62,202
62,202
Page
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