PIC16F777-I/P Microchip Technology Inc., PIC16F777-I/P Datasheet - Page 31

• Manufacturer Part Number: PIC16F777-I/P
• Description: 40 PIN, 14 KB FLASH, 368 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F777-I/P

• A/d Inputs: 14-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 36
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

3.0
The FLASH Program Memory is readable during nor-
mal operation over the entire V
addressed through Special Function Registers (SFR).
Up to 14-bit numbers can be stored in memory for use
as calibration parameters, serial numbers, packed 7-bit
ASCII, etc. Executing a program memory location con-
taining data that forms an invalid instruction results in a
NOP.
There are five SFRs used to read the program and
memory. These registers are:
• PMCON1
• PMDATA
• PMDATH
• PMADR
• PMADRH
The program memory allows word reads. Program
memory access allows for checksum calculation and
reading calibration tables.
REGISTER 3-1:
 2002 Microchip Technology Inc.
READING PROGRAM MEMORY
bit 7
bit 6-1
bit 0
PMCON1 REGISTER (ADDRESS 18Ch)
Legend:
R = Readable bit
- n = Value at POR reset
bit 7
Reserved: Read as ‘1’
Unimplemented: Read as '0'
RD: Read Control bit
1 = Initiates a FLASH read, RD is cleared in hardware. The RD bit can only be set (not cleared)
0 = FLASH read completed
reserved
R-1
in software.
DD
range. It is indirectly
U-0
—
U-0
—
W = Writable bit
’1’ = Bit is set
U-0
—
When interfacing to the program memory block, the
PMDATH:PMDATA registers form a two-byte word,
which
PMADRH:PMADR registers form a two-byte word,
which holds the 13-bit address of the FLASH location
being accessed. These devices can have up to 8K
words of program FLASH, with an address range from
0h to 3FFFh. The unused upper bits in both the
PMDATH and PMADRH registers are not implemented
and read as “0’s”.
3.1
The address registers can address up to a maximum of
8K words of program FLASH.
When selecting a program address value, the MSByte
of the address is written to the PMADRH register and
the LSByte is written to the PMADR register. The upper
MSbits of PMADRH must always be clear.
3.2
PMCON1 is the control register for memory accesses.
The control bit RD initiates read operations. This bit
cannot be cleared, only set, in software. It is cleared in
hardware at the completion of the read operation.
holds
PMADR
PMCON1 Register
U = Unimplemented bit, read as ‘0’
’0’ = Bit is cleared
U-x
—
the
14-bit
U-0
—
PIC16F7X
data
x = Bit is unknown
U-0
—
DS30325B-page 29
for
reads.
R/S-0
RD
bit 0
The