PIC16F777-I/P Microchip Technology Inc., PIC16F777-I/P Datasheet - Page 90

• Manufacturer Part Number: PIC16F777-I/P
• Description: 40 PIN, 14 KB FLASH, 368 RAM, 36 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F777-I/P

• A/d Inputs: 14-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 36
• Interface: I2C/SPI/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 40-pin PDIP
• Programmable Memory: 14K Bytes
• Ram Size: 368 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F7X
11.7
An A/D conversion can be started by the “special event
trigger” of the CCP2 module. This requires that the
CCP2M3:CCP2M0 bits (CCP2CON<3:0>) be pro-
grammed as 1011 and that the A/D module is enabled
(ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D conversion,
and the Timer1 counter will be reset to zero. Timer1 is
reset to automatically repeat the A/D acquisition period
TABLE 11-2:
DS30325B-page 88
0Bh,8Bh,
10Bh, 18Bh
0Ch
0Dh
8Ch
8Dh
1Eh
1Fh
9Fh
05h
85h
09h
89h
Legend: x = unknown, u = unchanged, - = unimplemented, read as '0'. Shaded cells are not used for A/D conversion.
Address
Note 1: Bits PSPIE and PSPIF are reserved on the PIC16F73/76; always maintain these bits clear.
Use of the CCP Trigger
2: These registers are reserved on the PIC16F73/76.
INTCON
PIR1
PIR2
PIE1
PIE2
ADRES
ADCON0
ADCON1
PORTA
TRISA
PORTE
TRISE
Name
(2)
SUMMARY OF A/D REGISTERS
(2)
PSPIE
PSPIF
A/D Result Register
ADCS1
Bit 7
GIE
IBF
—
—
—
—
—
—
(1)
(1)
ADCS0
ADIE
Bit 6
PEIE
ADIF
OBF
—
—
—
—
—
—
TMR0IE
PORTA Data Direction Register
CHS2
RCIE
IBOV
RCIF
Bit 5
RA5
—
—
—
—
PSPMODE
CHS1
INTE
Bit 4
TXIF
TXIE
RA4
—
—
—
—
SSPIF
SSPIE
CHS0 GO/DONE
RBIE
Bit 3
RA3
—
—
—
—
—
with minimal software overhead (moving the ADRES to
the desired location). The appropriate analog input
channel must be selected and an appropriate acquisi-
tion time should pass before the “special event trigger”
sets the GO/DONE bit (starts a conversion).
If the A/D module is not enabled (ADON is cleared),
then the “special event trigger” will be ignored by the
A/D module, but will still reset the Timer1 counter.
PORTE Data Direction Bits
TMR0IF
CCP1IF
CCP1IE
PCFG2
Bit 2
RA2
RE2
—
—
TMR2IF TMR1IF 0000 0000 0000 0000
TMR2IE TMR1IE 0000 0000 0000 0000
PCFG1
Bit 1
INTF
RA1
RE1
—
—
—
CCP2IF ---- ---0 ---- ---0
CCP2IE ---- ---0 ---- ---0
PCFG0 ---- -000 ---- -000
ADON
RBIF
Bit 0
RA0
RE0
 2002 Microchip Technology Inc.
0000 000x 0000 000u
xxxx xxxx uuuu uuuu
0000 00-0 0000 00-0
--0x 0000 --0u 0000
--11 1111 --11 1111
---- -xxx ---- -uuu
0000 -111 0000 -111
Value on:
POR,
BOR
Value on
RESETS
all other