PIC16F676-I/ST Microchip Technology Inc., PIC16F676-I/ST Datasheet - Page 75

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PIC16F676-I/ST

Manufacturer Part Number
PIC16F676-I/ST
Description
14 PIN, 1.75 KB FLASH, 64 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F676-I/ST

Comparators
1
Cpu Speed
5 MIPS
Eeprom Memory
128 Bytes
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
14-pin TSSO
Programmable Memory
1.75K Bytes
Ram Size
64 Bytes
Speed
20 MHz
Timers
1-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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10.2
ADDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ADDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDLW
Syntax:
Operands:
Operation:
Status Affected:
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected:
Description:
 2003 Microchip Technology Inc.
Instruction Descriptions
(W) .AND. (f) → (destination)
Add W and f
[label] ADDWF
0 ≤ f ≤ 127
d ∈ [0,1]
(W) + (f) → (destination)
C, DC, Z
Add the contents of the W register
with register 'f'. If 'd' is 0, the result
is stored in the W register. If 'd' is
1, the result is stored back in
register 'f'.
AND W with f
[label] ANDWF
0 ≤ f ≤ 127
d ∈ [0,1]
Z
AND the W register with register
'f'. If 'd' is 0, the result is stored in
the W register. If 'd' is 1, the result
is stored back in register 'f'.
Add Literal and W
[label] ADDLW
0 ≤ k ≤ 255
(W) + k → (W)
C, DC, Z
The contents of the W register
are added to the eight-bit literal 'k'
and the result is placed in the W
register.
AND Literal with W
[label] ANDLW
0 ≤ k ≤ 255
(W) .AND. (k) → (W)
Z
The contents of W register are
AND’ed with the eight-bit literal
'k'. The result is placed in the W
register.
k
f,d
k
f,d
BCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSS
Syntax:
Operands:
Operation:
Status Affected:
Description:
BTFSC
Syntax:
Operands:
Operation:
Status Affected:
Description:
PIC16F630/676
Bit Test, Skip if Clear
[label] BTFSC f,b
0 ≤ f ≤ 127
0 ≤ b ≤ 7
skip if (f<b>) = 0
None
If bit 'b' in register 'f' is '1', the next
instruction is executed.
If bit 'b', in register 'f', is '0', the
next instruction is discarded, and
a NOP is executed instead, making
this a 2-cycle instruction.
Bit Test f, Skip if Set
[label] BTFSS f,b
0 ≤ f ≤ 127
0 ≤ b < 7
skip if (f<b>) = 1
None
If bit 'b' in register 'f' is '0', the next
instruction is executed.
If bit 'b' is '1', then the next instruc-
tion is discarded and a NOP is
executed instead, making this a
2-cycle instruction.
Bit Clear f
[label] BCF
0 ≤ f ≤ 127
0 ≤ b ≤ 7
0 → (f<b>)
None
Bit 'b' in register 'f' is cleared.
Bit Set f
[label] BSF
0 ≤ f ≤ 127
0 ≤ b ≤ 7
1 → (f<b>)
None
Bit 'b' in register 'f' is set.
f,b
f,b
DS40039C-page 73

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