CS4954-CQZ Cirrus Logic Inc, CS4954-CQZ Datasheet - Page 19

• Manufacturer Part Number: CS4954-CQZ
• Description: IC VIDEO ENCODER NTSC/PAL 48TQFP
• Manufacturer: Cirrus Logic Inc
• Type: Video Encoderr

Specifications of CS4954-CQZ

• Package / Case: 48-TQFP, 48-VQFP
• Voltage - Supply, Analog: 3.15 V ~ 5.25 V
• Voltage - Supply, Digital: 3.15 V ~ 5.25 V
• Mounting Type: Surface Mount
• Operating Supply Voltage: 3.3 V / 5 V
• Supply Current: 70 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Resolution: 10 bit
• Snr: 70 dB
• Input Format: Digital
• Output Format: Analog
• Supply Voltage Range: 3.15V To 3.45V
• Operating Temperature Range: -40°C To +85°C
• Tv / Video Case Style: TQFP
• No. Of Pins: 48
• Tv / Video Type: Encoder
• Rohs Compliant: Yes
• Filter Terminals: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CDB4955A - EVALUATION BOARD FOR CS4955A
• Applications: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1682

Field two begins with VSYNC transitioning low at
line 266. VSYNC stays low for 3 line cycles and
transitions high during the end of line 268. Video
input on the V [7:0] pins is expected between line
284 and line 522. Field two is 263 lines; field one
is 262 lines.
5.2.9 PAL Progressive Scan
VSYNC will transition low at the beginning of the
odd field and will remain low for 2.5 lines or 2160
pixel cycles (864 × 2.5). PAL non-interlaced tim-
ing is illustrated in Figure 10. In this mode, the
CS4954/5 expects digital video input on the V [7:0]
pins for 288 lines, beginning on active video line 23
and continuing through line 309.
The second field begins with VSYNC transitioning
low after 312 lines from the beginning of the first
field. VSYNC stays low for 2.5 line-times and tran-
sitions high during the middle of line 315. Video
input on the V [7:0] pins is expected between line
DS278F6
523
523
261
261
Burst begins with positive half-cycle
524
524
262
262
525
525
263
263
Analog
Field 1
1
Analog
Field 2
Analog
Field 3
1
Analog
Field 4
264
264
2
2
Figure 7. NTSC Video Interlaced Timing
265
265
3
3
266
266
VSYNC Drops
VSYNC Drops
4
4
267
267
5
5
268
268
6
6
335 through line 622. Field two is 313 lines; field
one is 312 lines.
5.3
The CS4954/5 supports an ITU-R.BT656 slave
mode feature that is selectable through the ITU-
R.BT656 bit of the CONTROL_0 Register. The
ITU-R.BT656 slave feature is unique because the
horizontal and vertical timing and digital video are
combined into a single 8-bit 27 MHz input. With
ITU-R.BT656 there are no horizontal and vertical
input or output strobes, only 8-bit 27 MHz active
CbYCrY data, with start- and end-of-video codes
implemented using reserved 00 and FF code se-
quences within the video feed. As with all modes,
V [7:0] are sampled with the rising edge of CLK.
The CS4954/5 expects the digital ITU-R.BT656
stream to be error-free. The FIELD
gles as with non ITU-R.BT656 input. ITU-
R.BT656 input timing is illustrated in Figure 11.
Burst begins with negative half-cycle
269
269
7
7
270
270
ITU-R.BT656
8
8
271
271
9
9
272
272
10
10
CS4954 CS4955
284
284
22
22
285
285
(1)
output tog-
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