CS4954-CQZ Cirrus Logic Inc, CS4954-CQZ Datasheet - Page 34

• Manufacturer Part Number: CS4954-CQZ
• Description: IC VIDEO ENCODER NTSC/PAL 48TQFP
• Manufacturer: Cirrus Logic Inc
• Type: Video Encoderr

Specifications of CS4954-CQZ

• Package / Case: 48-TQFP, 48-VQFP
• Voltage - Supply, Analog: 3.15 V ~ 5.25 V
• Voltage - Supply, Digital: 3.15 V ~ 5.25 V
• Mounting Type: Surface Mount
• Operating Supply Voltage: 3.3 V / 5 V
• Supply Current: 70 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Channels: 2
• Resolution: 10 bit
• Snr: 70 dB
• Input Format: Digital
• Output Format: Analog
• Supply Voltage Range: 3.15V To 3.45V
• Operating Temperature Range: -40°C To +85°C
• Tv / Video Case Style: TQFP
• No. Of Pins: 48
• Tv / Video Type: Encoder
• Rohs Compliant: Yes
• Filter Terminals: SMD
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: CDB4955A - EVALUATION BOARD FOR CS4955A
• Applications: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1682

current flow from the output. To completely dis-
able or for low power device operation, the blue
DAC can be totally shut down via the B_PD con-
trol register bit in Control Register 4 (0×04). In this
mode turn-on using the control register will not be
instantaneous.
7.4.7 DAC Useage Rules
If some of the 6 DACs are not used, it is strongly
recommended
CONTROL_4 register) in order to reduce the pow-
er dissipation.
Depending on the external resistor connected to the
ISET pin the output drive of the DACs can be
changed. An external resistor of 4 kΩ must be con-
nected to the ISET pin for normal operation.
There are two outpout impedance modes that the
DACs can be operated in. The first mode is the high
impedance mode (LOW_IMP bit set to 0). In this
mode, the DAC output drives a double terminated
300 Ω load and will output a video signal which
conforms to the proper analog video specifications.
External buffers will be needed if the DAC output
load differs from a double terminated 300 Ω load.
The second mode is the low impedence mode
(LOW_IMP but set to 1). In this mode, the DAC
output drives a double terminated 75 Ω load and
will output a video signal which conforms to the
proper analog video specifications. No external
buffers are necessary. The ouputs can directly drive
a television input.
Note that for power dissipation purposes it is not
always possible to have all the 6 DACs active at the
same time. Table
active DACs allowed depending on the power sup-
ply and low/high impedance modes. If less than 6
DACs are allowed to be active, the other DACs
must be powered down (see CONTROL_4 regis-
ter).
34
to
8
shows the maximum number of
power
them
down
(see
8.
8.1
The CS4954/5 host control interface can be config-
ured for I²C or 8-bit parallel operation. The
CS4954/5 will default to I²C operation when the
RD and WR pins are both tied low at power up. The
RD and WR pins are active for 8-bit parallel oper-
ation only.
8.1.1 I²C
The CS4954/5 provides an I²C interface for access-
ing the internal control and status registers. Exter-
nal pins are a bidirectional data pin (SDA) and a
serial input clock (SCL). The protocol follows the
I²C specifications. A complete data transfer is
shown in Figure 26. Note that this I²C interface
will work in Slave Mode only - it is not a bus mas-
ter.
SDA and SCL are connected via an external pull-
up resistor to a positive supply voltage. When the
bus is free, both lines are high. The output stages of
devices connected to the bus must have an open-
drain or open-collector in order to perform the
wired-AND function. Data on the I²C bus can be
transferred at a rate of up to 400 Kbits/sec in fast
mode. The number of interfaces to the bus is solely
dependent on the limiting bus capacitance of 400
pF. When 8-bit parallel interface operation is being
used, SDA and SCL can be tied directly to ground.
The I²C bus address for the CS4954/5 is program-
mable via the I2C_ADR Register (0×0F). When
I²C interface operation is being used, RD and WR
Nominal Power
supply
PROGRAMMING
3.3V
3.3V
5.0V
5.0V
Host Control Interface
Table 8. Maximum DAC Numbers
®
Interface
High Impedance
High Impedance
Low Impedance
Low Impedance
Impedance
Low/High
mode
CS4954 CS4955
maximum # of
active DACs
3
6
3
6
DS278F6