STA016AP STMicroelectronics, STA016AP Datasheet - Page 18

• Manufacturer Part Number: STA016AP
• Description: DECODER AUDIO MPEG 2.5 64-TQFP
• Manufacturer: STMicroelectronics
• Type: Audio Decoderr

Specifications of STA016AP

• Applications: Multimedia
• Mounting Type: Surface Mount
• Package / Case: 64-TQFP, 64-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply, Analog: -
• Voltage - Supply, Digital: -

STA016A
Type : RW - DEC
Software Reset : 10
Description :
This register must contain a MDIV value that enables
the system PLL to generate a frequency of 42.5 MHz
for the SYSCK.See table 4.
Default value at soft reset assume :
6.4 I
6.4.1
Address : 0x66 (102)
Type : RW - DEC
Software Reset : 0
Description :
If set to 1 enable the configurability of the PCM-
BLOCK Output thanks to following registers, else dis-
able this configurability and take embedded default
configuration for PCM-BLOCK registers.
Note that this embedded default configuration can be
retrieved by user thanks to following setting :
6.4.2
Address : 0x67 (103)
Type : RW - DEC
Software Reset : 0
Description :
If OUTPUT_CONF == 1, configure the divider to gen-
erate the bit clock of the I2Sout interface, called
BCK0, from PCMCK. according the following relation
: BCKO = PCMCK / 2 * (PCM_DIV+1)
18/43
b7
b7
– external crystal provide a CRYCK running at
– PCM_DIV = 3;
– PCM_CONF = 0;
– PCM_CROSS = 0;
0
14.31818 MHz
description
2
Sout_CONFIGURATION registers
OUTPUT_CONF :
PCM_DIV :
b6
b6
0
DV5
b5
b5
DV4
b4
b4
DV3
b3
b3
DV2
b2
b2
DV1
b1
b1
DV0
b0
b0
6.4.3
Address : 0x68 (104)
Type : RW - DEC
Software Reset : 0
Description :
If OUTPUT_CONF == 1, configure the I2Sout inter-
face according following table
Table 12. .
6.4.4
Address : 0x69 (105)
Type : RW - DEC
Software Reset : 0
Description :
If OUTPUT_CONF == 1, CR[1:0] is used to configure
CO[1:0] 0 : 16 bits mode (16 slots transmitted).
fields
b7
b7
CO2
CO3
CO4
CO5
CO6
0
0
Bit
CO6
PCM_CONF :
PCM_CROSS :
b6
b6
0
1 : 18 bits mode (18 slots transmitted).
2 : 20 bits mode (20 slots transmitted).
3 : 24 bits mode (24 slots transmitted).
Polarity of BCKO :
0 : data are sent on the falling edge & stable
on the rising).
1 : (data are sent on the rising edge & stable
on the falling).
0 : I2S format is selected
1 : other format is selected
Polarity of LRCKO :
0 : low->right, high->left).
1 : low->left, high->right so compliant to I2S
format ).
0 : data are in the last BCKO cycles of
LRCKO (right aligned data).
1 : data are in the first BCKO cycles of
LRCKO (left aligned data).
0 : the transmission is LS bit first.
1 : the transmission is MS bit first.
CO5
b5
b5
0
CO4
b4
b4
0
Comment
CO3
b3
b3
0
CO2
b2
b2
0
CO1
CR1
b1
b1
CO0
CR0
b0
b0