MCP23S18-E/SP Microchip Technology, MCP23S18-E/SP Datasheet - Page 24

• Manufacturer Part Number: MCP23S18-E/SP
• Description: IC EXPANDER SPI 16BIT I/O 28SDIP
• Manufacturer: Microchip Technology

Specifications of MCP23S18-E/SP

• Package / Case: 28-DIP (0.300", 7.62mm)
• Interface: SPI
• Number Of I /o: 16
• Interrupt Output: Yes
• Frequency - Clock: 10MHz
• Voltage - Supply: 1.8 V ~ 5.5 V
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Through Hole
• Logic Family: MCP
• Operating Supply Voltage: 1.8 V to 5.5 V
• Power Dissipation: 700 mW
• Operating Temperature Range: - 40 C to + 125 C
• Input Voltage: 1.8 V to 5.5 V
• Maximum Clock Frequency: 10 MHz
• Mounting Style: Through Hole
• Output Current: 400 mA
• Output Voltage: 0.7 V
• Chip Configuration: 16 Bit
• Bus Frequency: 10MHz
• Ic Interface Type: SPI
• No. Of I/o's: 16
• Supply Voltage Range: 1.8V To 5.5V
• Digital Ic Case Style: DIP
• No. Of Pins: 28
• Filter Terminals: DIP
• Rohs Compliant: Yes
• Delay Time: 50ns
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

MCP23018/MCP23S18
REGISTER 1-8:
DS22103A-page 24
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
BANK
BANK: Controls how the registers are addressed (see
1 = The registers associated with each port are separated into different banks
0 = The registers are in the same bank (addresses are sequential)
MIRROR: INT pins mirror bit
1 = The INT pins are internally connected in a wired OR configuration
0 = The INT pins are not connected. INTA is associated with Port A and INTB is associated with Port B
SEQOP: Sequential Operation mode bit.
1 = Sequential operation disabled, address pointer does not increment.
0 = Sequential operation enabled, address pointer increments.
Unimplemented: Reads as 0
Unimplemented: Reads as 0
ODR: Configures the INT pin as an open-drain output.
1 = Open-drain output (overrides the INTPOL bit).
0 = Active driver output (INTPOL bit sets the polarity).
INTPOL: Sets the polarity of the INT output pin.
1 = Active-high.
0 = Active-low.
INTCC: Interrupt Clearing Control
1 = Reading INTCAP register clears the interrupt
0 = Reading GPIO register clears the interrupt
MIRROR
R/W-0
IOCON – I/O EXPANDER CONFIGURATION REGISTER
W = Writable bit
‘1’ = Bit is set
SEQOP
R/W-0
U-0
-
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
-
Figure 1-4
R/W-0
ODR
and
Figure
© 2008 Microchip Technology Inc.
x = Bit is unknown
INTPOL
R/W-0
1-5)
INTCC
R/W-0
bit 0