SI3015-BS Silicon Laboratories Inc, SI3015-BS Datasheet - Page 31

• Manufacturer Part Number: SI3015-BS
• Description: IC ISOMODEM LINE-SIDE 16SOIC
• Manufacturer: Silicon Laboratories Inc
• Type: Enhanced Global Direct Access Arrangementr

Specifications of SI3015-BS

• Package / Case: 16-SOIC (3.9mm Width)
• Data Format: V.90
• Interface: Serial
• Voltage - Supply: 3.3 V ~ 5 V
• Mounting Type: Surface Mount
• Product: Modem Module
• Supply Current: 0.3 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Baud Rates: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Contains lead / RoHS non-compliant

AC-Link Digital Serial Interface Protocol
The Si3024 incorporates a 5-pin digital serial interface
that links it to the AC’97 controller. AC-link is a bi-
directional, fixed rate, serial PCM digital stream. It
handles multiple input and output audio streams
(including modems), as well as control register
accesses employing a TDM scheme. The AC-link
architecture divides each audio frame into 12 outgoing
and 12 incoming data streams, each with 20-bit sample
resolution. The Si3024 data streams are as follows:
Control—Control register write port; two output slots
Status—Control register read port; two input slots
Modem Line Codec Output—Modem line codec
DAC input stream; one output slot per line
Modem Line Codec Input—Modem line codec ADC
output stream; one input slot per line
SDATA_OUT
Figure 27. Si3038 Connection To AC’97 Controller (Primary Device Configuration)
SDATA_IN
Slot #
SYNC
SLOTREQ 3-12
Codec ID
Controller
Digital
AC'97
Tag
Tag
0
Figure 28. Standard Bi-Directional Audio Frame
ADDR
Status
ADDR
CMD
1
Status
DATA
DATA
CMD
2
PCM
PCM
SDATA_OUT
3
L
L
SDATA_IN
BIT_CLK
RESET
SYNC
PCM
PCM
4
R
R
Rev. 2.01
Line 1
Line 1
DAC
ADC
5
Synchronization of all AC-link data transactions is
signaled by the AC’97 controller. The Si3024 drives the
serial bit clock onto AC-link, which the AC’97 controller
then qualifies with a synchronization signal to construct
audio frames.
The SYNC signal, fixed at 48 kHz, is derived by dividing
down the serial bit clock (BIT_CLK). BIT_CLK, fixed at
12.288 MHz,
granularity to support 12 20-bit outgoing and incoming
time slots. AC-link serial data is transitioned on each
rising edge of BIT_CLK. The receiver of AC-link data,
the Si3024 for outgoing data and the AC’97 controller
for incoming data, samples each serial bit on the falling
edges of BIT_CLK.
I/O Control—DAA control and GPIO; one output slot
I/O Status—DAA status and GPIO; one input slot
Center
PCM
ADC
MIC
6
L SURR
RSRVD
PCM
7
R SURR
RSRVD
PCM
provides
8
Si3024
RSRVD
9
PCM
LFE
PCM L
Line 2
Line 2
10
(n+1)
ADC
DAC
the
PCM R
HSET
HSET
(n+1)
ADC
11
DAC
necessary
STATUS
PCM C
CTRL
(n+1)
12
IO
IO
Si3038
clocking
31