QT60486-ASG Atmel, QT60486-ASG Datasheet
QT60486-ASG
Specifications of QT60486-ASG
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QT60486-ASG Summary of contents
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... Unlike older methods, it does not require one IC per key. -40 -40 LQ Appliance controls ATM machines Outdoor keypads Touch-screens AVAILABLE OPTIONS T # Keys +105 +105 QT60326, QT60486 32 & ATRIX MOSI 1 MISO 2 SCK 3 /RST 4 QT60326 Vdd 5 QT60486 Vss 6 XT2 7 ...
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... QT60486-AS R8.01/0105 ...
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... Part differences Versions of the device are capable of a maximum keys (QT60326, QT60486 respectively). These devices are identical in all respects, except that each is capable of only the number of keys specified. These keys can be located anywhere within the electrical grid and 6 Y scan lines ...
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... Unused Y lines do not require an Rs resistor. Figure 2-1 VCs - Non-Linear During Burst (Burst too long too small, or X-Y capacitance too large) Figure 2-2 VCs - Poor Gain, Non-Linear During Burst (Excess capacitance from Y line to Gnd) Figure 2-3 Vcs - Correct 4 QT60486-AS R8.01/0105 ...
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... X line(s) (by a layout change, for example by reducing X line exposure to nearby ground planes or traces), or, the Rx resistor needs to be reduced in value (or a combination of both approaches). One way to determine X settling time is to monitor the fields using a patch of metal foil or a small coin over the key (Figure 5 QT60486-AS R8.01/0105 ...
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... From powerup to ability to communicate the event the setups have been changed and the part needs to backup the EEPROM to flash. 4. Normal cold start to ability to communicate: 3ms (Normal initialization from any reset) 5. Calibration time per key vs. burst spacings for 32 and 48 enabled keys (Table below): 6 QT60486-AS R8.01/0105 ...
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... FMEA tests easily. These tests are performed during a dummy timeslot after the last enabled key. The sequence of tests are performed repeatedly during normal running once all initialization, include the burst spacing optimization in auto mode, is complete. During initialization, all 7 QT60486-AS R8.01/0105 ...
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... CRC communications checks on all critical command and data transmissions. ‘Last-command’ command to verify that an instruction was properly received. Loss of communications reset of the host controller. For those applications requiring it, Quantum can supply sample FMEA test data on special request. 8 QT60486-AS R8.01/0105 ...
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... Leave open Leave open Leave open - - Leave open Leave open Leave open Leave open Leave open Leave open Leave open Leave open - - - Leave open Leave open Leave open Leave open Leave open Leave open - - Leave open - - Leave open Leave open QT60486-AS R8.01/0105 ...
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... RX7 1K RX6 1K RX5 1K RX4 RX3 1K RX2 1K RX1 1K RX0 RY0 CS0 4.7nF RY1 CS1 4.7nF RY2 CS2 4.7nF RY3 CS3 4.7nF RY4 CS4 4.7nF RY5 CS5 4.7nF Note 1: Leave Y4A, Y4B, Y5A, Y5B unconnected for QT60326 RS3 RS2 RS1 RS0 QT60486-AS R8.01/0105 ...
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... Recommended Values of Ra & Ca SPI Clock Rate Ra 4MHz 680 400kHz 1,000 100kHz 2,200 50kHz 2,200 11 <20ms <20ms <5ms 1µs 1ms QT60xx6 DRDY SS SCK MISO MOSI QT60xx6 Circuit X drives DRDY shown) SS SCK MISO Y Lines MOSI shown) RESET Ca 33pF 270pF 470pF 1nF QT60486-AS R8.01/0105 ...
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... Return data is sent from the QT back to the host when the data is ready. S2: [20ns S3: m25ns S6: m1µs S7: m125ns {optional 2nd command byte} S4 3-state S4: [20ns S8: m125ns S9: m250ns {null byte or next command to get QT response QT60486-AS R8.01/0105 data response ...
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... Since the host device is always the master in SPI mode, and data is clocked in both directions, the Null command is required frequently to act as a placeholder where the desire is to only get data back from the QT, not to send a command. U4 QT60486-AS R8.01/0105 QT60xx6 Tx Rx DRDY <20ms <20ms ...
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... Bit 2: Reports either a cal failure (failed in 5 sequential attempts) on any enabled key or, that an enabled key has a very low signal reference value, lower than the user-settable LSL value (Section 5.15). Bit 1: Set if any key is in the process of calibrating. Bit 0: Set if any key is in detection (touched). 14 QT60486-AS R8.01/0105 ...
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... Setups table CRC and is sent LSByte first. 4.14 Eeprom CRC - 0x0e This command returns the 16-bit CRC calculated from the eeprom contents. The CRC is sent back LSByte first. The CRC sent back is the same CRC that is appended to the end of the Setups block QT60486-AS R8.01/0105 ...
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... Returns the 1’s compliment of 0xck just before the key is recalibrated. 4.23 Command Sequencing To interface the device with a host, the flow diagram of Figure 4-1, page 17, is suggested. The actual settings of the Setups block used should normally just be the default settings except 16 QT60486-AS R8.01/0105 ...
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... This happens at the factory, during the very first powerup cycle. The ‘Last Command’ command can be used at any time to clear comms error flags and to resynchronize failed communications, for example due to timing errors etc. 17 QT60486-AS R8.01/0105 ...
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... Bits 5..0: indicates key number (0..47) of first key touched; reads 0x3F (63 decimal touch. 2nd return byte is CRC-8 of cmmd + return data 0..0xFF Last return byte is CRC-8 of cmmd + return data 6 bytes 0..0xFFFF Returns block data for all keys’ signals words The low order byte is returned first. 18 Notes Page QT60486-AS R8.01/0105 ...
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... Second return byte is CRC-8 of cmmd + return data Used in Run mode. Normal sensing of other keys not affected. CAL of ‘k’ only takes place in the key’s normal timeslot ~0xck Returns the ones compliment of the cmd char, once the cal is scheduled. 19 Notes Page Resets the QT60486-AS R8.01/0105 ...
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... Decreasing signals should not be compensated quickly, since an approaching finger could be compensated for partially or entirely before even touching the touch pad. However, an obstruction over the sense pad, for which the Figure 5-1 Thresholds and Drift Compensation Reference Hysteresis Threshold Signal Output QT60486-AS R8.01/0105 ...
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... It is almost always desirable in these cases to cause the key to recalibrate quickly restore normal touch operation. The time required to do this is governed by PRD. In order for this to work, the signal must rise through the 21 QT60486-AS R8.01/0105 ...
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... DWELL possible values (125, 187.5, 312.5ns ) 5.12 Mains Sync - MSYNC The MSync feature uses the WS pin. The Sleep and Sync features can be used simultaneously; the part can be put into Sleep mode, but awakened by a mains sync signal at the desired time. 22 QT60486-AS R8.01/0105 0 (Off) ...
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... Host CRC - HCRC The setups block terminates with a 16-bit CRC, HCRC, of the entire block. The formulae for calculating this CRC and the 8-bit CRC also used in the device are shown in Section 7. The low order byte should be sent first. 23 QT60486-AS R8.01/0105 0x6c ...
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... The low order byte should be sent first. 0..255 8 device 0x6c Controls what the LED does; see table, below. CRC-16 of above setups, does NOT include CRC of command itself. The low 0..65K 16 device - order byte should be sent first. See also CRC notes, page 29. 24 Page QT60486-AS R8.01/0105 ...
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... Thus, key location X0,Y0 and key location X5,Y3. . Byte (Y line) lQ Bit (X line Note: Byte 0 is returned first Default LED pin is active low polarity 0 Key errors have no effect 1 Not active on any keypress 1 Inactive on Sleep 0 Inactive on eeprom error 1 Inactive on Mains sync error 1 Inactive on comms error 0 Communications unmonitored QT60486-AS R8.01/0105 ...
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... Per key Per key Global Global Global - Off - - Off - 6.25% 125ns - Off - On On -12.5%- -187.5ns- On 25% 312.5ns 50% QT60486-AS R8.01/0105 BS UART Global Global - Auto - -9,600- 500µs 19,200 750µs 38,400 1,000µs 57,600 1,250µs 115,200 1,500µs 1,750µs 2,000µs 2,250µ ...
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... SPI parameter controlled by host ns SPI parameter controlled SPI parameter controlled by host ns SPI parameter controlled by QT µs SPI parameter controlled by QT µs SPI parameter controlled SPI parameter controlled by host ns SPI parameter controlled by host ns SPI parameter controlled by host MHz SPI parameter controlled by host QT60486-AS R8.01/0105 ...
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... BSC 8.00 8.00 BSC 0 7 TQFP Part T Number QT60326-AS QT60486-AS Inches Min Max Notes 0.386 0.394 0.458 0.478 0.003 0.008 0.018 0.030 0.002 0.006 - 0.047 0.012 0.018 0.031 0.031 0.315 0.315 0 7 Keys Marking 32 QT60326-AG 48 QT60486-AG QT60486-AS R8.01/0105 SQ SQ BSC BSC ...
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... A CRC calculator for Windows is available free of charge from Quantum Research. lQ crc is an unsigned 8 bit number // shift counter // intermediate test bit // initialize the shift counter // loop 8 times // loop 8 times 29 QT60486-AS R8.01/0105 ...
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... PCB, adhesive, and panel in that sequence. This results in a very low cost design. 7.4 PCB Layout Shown is an example 32-key PCB layout using inexpensive 1-sided CEM-1 or FR-1 PCB laminate. The key layouts follow the design rules of Figure 2-6 (page 5) and as shown above 0-ohm SMT Jumper X Y QT60486-AS R8.01/0105 ...
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... NOTES lQ 31 QT60486-AS R8.01/0105 ...
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Tel: +44 (0)23 8056 5600 Fax: +44 (0)23 8045 3939 The specifications set out in this document are subject to change without notice. All products sold and services supplied by QRG are subject to our Terms and Conditions of ...