AD9805JS Analog Devices Inc, AD9805JS Datasheet - Page 7

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AD9805JS

Manufacturer Part Number
AD9805JS
Description
IC CCD SIGNAL PROC 10BIT 64-PQFP
Manufacturer
Analog Devices Inc
Type
CCD Signal Processor, 12-Bitr
Datasheet

Specifications of AD9805JS

Rohs Status
RoHS non-compliant
Input Type
Logic
Output Type
Logic
Interface
Microprocessor
Current - Supply
86mA
Mounting Type
Surface Mount
Package / Case
64-MQFP, 64-PQFP
Operating Temperature (min)
0C
Operating Temperature (max)
70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
64
Lead Free Status / RoHS Status
Not Compliant

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REV. 0
ABSOLUTE MAXIMUM RATINGS*
Parameter
AVDD
AVSS
DVDD
AGND
AVDD
Clock Input
Digital Outputs
AIN, VREF
Junction Temperature
Storage Temperature
Lead Temperature (10 sec)
*Stresses above those listed under “Absolute Maximum Ratings” may cause
Model
AD9807JS
AD9805JS
*S = Plastic Quad Flatpack.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9807/AD9805 feature proprietary ESD protection circuitry, permanent damage
may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
permanent damage to the device. This is a stress rating only; functional operation
of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum ratings for extended periods may affect device reliability.
Temperature
Range
0 C to +70 C
0 C to +70 C
ORDERING GUIDE
With
Respect
AVSS
AVDD
DVSS
DVSS
DVDD
DVSS
DVSS
AVSS
to
Min Max
–0.5
–6.5
–0.5
–0.3
–6.5
–0.5
–0.5
–0.3
–65
Package
Description
PQFP
PQFP
+6.5
+6.5
+0.5
+6.5
+0.3
DVDD + 0.5 Volts
AVDD + 0.3 Volts
AVDD + 0.3 Volts
+150
+150
+300
Package
Option*
S-64
S-64
Units
Volts
Volts
Volts
Volts
Volts
C
C
C
–7–
DEFINITIONS OF SPECIFICATIONS
INTEGRAL NONLINEARITY
Linearity error refers to the deviation of each individual code
from a line drawn from “negative full scale” through “positive
full scale.” The point used as “negative full scale” occurs
before the first code transition. “Positive full scale” is defined as a
level 1 1/2 LSB beyond the last code transition. The deviation is
measured from the middle of each particular code to the true
straight line.
DIFFERENTIAL LINEARITY ERROR (DNL, NO MISSING
CODES)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Thus every
code must have a finite width. Guaranteed no missing codes
to 12-bit resolution indicates that all 4096 codes, respectively,
must be present over all operating ranges.
UNIPOLAR OFFSET ERROR
In the unipolar mode, the first transition should occur at a level
1/2 LSB above analog common. Unipolar offset is defined as
the deviation of the actual from that point. The unipolar offset
temperature coefficient specifies the maximum change of the
transition point over temperature, with or without external
adjustments.
GAIN ERROR
The last transition should occur for an analog value 1 1/2 LSB
below the nominal full scale. Gain error is the deviation of the
actual difference between first and last code transitions and the
ideal difference between first and last code transitions.
POWER SUPPLY REJECTION
Power Supply Rejection specifies the maximum full-scale change
from the initial value with the supplies at the various limits.
APERTURE DELAY
Aperture delay is a timing measurement between the sampling
clocks and the CDS. It is measured from the falling edge of the
CDSCLK2 input to when the input signal is held for conversion
in CDS mode. In non-CDS mode, it is the falling edge of
CDSCLK1.
AD9807/AD9805
WARNING!
ESD SENSITIVE DEVICE
1/2 LSB

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