AD9895KBCRL Analog Devices Inc, AD9895KBCRL Datasheet - Page 46

• Manufacturer Part Number: AD9895KBCRL
• Description: IC CCD SIGNAL PROC/GEN 64-CSPBGA
• Manufacturer: Analog Devices Inc
• Type: CCD Signal Processor, 12-Bitr

Specifications of AD9895KBCRL

• Rohs Status: RoHS non-compliant
• Input Type: Logic
• Output Type: Logic
• Interface: 3-Wire Serial
• Mounting Type: Surface Mount
• Package / Case: 64-CSPBGA
• Analog Front End Type: CCD
• Analog Front End Category: Video
• Interface Type: Serial (3-Wire)
• Sample Rate: 30MSPS
• Operating Supply Voltage (min): 2.7/3V
• Resolution: 12b
• Number Of Adc's: 1
• Power Supply Type: Analog/Digital
• Operating Temp Range: -20C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: CSPBGA
• Number Of Channels: 1
• Current - Supply: -
• Lead Free Status / RoHS Status: Not Compliant

AD9891/AD9895
Address
0BD
0BE
0BF
0C0
0C1
0C2
0C3
0C4
0C5
0C6
0C7
0C8
0C9
0CA
0CB
0CC
0CD
0CE
0CF
0D0
0D1
0D2
0D3
0D4
0D5
0D6
0D7
0D8
0D9
0DA
Address
0DB
0DC
0DD
0DE
0DF
0E0
0E1
0E2
0E3
0E4
0E5
0E6
OE7
0E8
0E9
0EA
Content
[0]
[5:0]
[5:0]
[5:0]
[5:0]
[0]
[5:0]
[5:0]
[5:0]
[5:0]
[0]
[5:0]
[5:0]
[5:0]
[5:0]
[0]
[5:0]
[5:0]
[5:0]
[5:0]
[1:0]
[5:0]
[5:0]
[1:0]
[5:0]
[5:0]
[1:0]
[5:0]
[5:0]
[1:0]
Content
[0]
[5:0]
[5:0]
[0]
[5:0]
[5:0]
[2:0]
[2:0]
[2:0]
[2:0]
[0]
[5:0]
[5:0]
[2:0]
[5:0]
[5:0]
Bit
Width
1
6
6
6
6
1
6
6
6
6
1
6
6
6
6
1
6
6
6
6
0
2
6
6
2
6
6
2
6
6
2
Bit
Width
1
6
6
1
6
6
3
3
3
3
1
6
6
3
6
6
Table XXVI. H1–H4, RG, SHP, SHD Register Map
Default
Value
00
10
03
3F
3F
00
3F
3F
3F
3F
00
3F
3F
3F
3F
00
3F
3F
3F
3F
00
00
3F
3F
00
3F
3F
00
3F
3F
Default
Value
01
00
20
01
00
20
03
03
03
03
01
00
10
02
24
00
00
Table XXV. PBLK Register Map
Register Name
PBLKTOG1_0[11:6]
Register Name
H1DRV
H2DRV
H3DRV
H4DRV
RGDRV
SHPPOSLOC
SHDPOSLOC
PBLKSPOL0
PBLKTOG1_0[5:0]
PBLKBTOG2_0[5:0]
PBLKBTOG2_0[11:6]
PBLKSPOL1
PBLKTOG1_1[5:0]
PBLKTOG1_1[11:6]
PBLKTOG2_1[5:0]
PBLKTOG2_1[11:6]
PBLKSPOL2
PBLKTOG1_2[5:0]
PBLKTOG1_2[11:6]
PBLKTOG2_2[5:0]
PBLKTOG2_2[11:6]
PBLKSPOL3
PBLKTOG1_3[5:0]
PBLKTOG1_3[11:6]
PBLKTOG2_3[5:0]
PBLKTOG2_3[11:6]
PBLKSCP0
PBLKSPTR0
PBLKSCP1[5:0]
PBLKSCP1[11:6]
PBLKSPTR1
PBLKSCP2[5:0]
PBLKSCP2[11:6]
PBLKSPTR2
PBLKSCP3[5:0]
PBLKSCP3[11:6]
PBLKSPTR3
H12POL
H1POSLOC
H1NEGLOC
H34POL
H3POSLOC
H3NEGLOC
RGPOL
RGPOSLOC
RGNEGLOC
–46–
Register Description
Sequence #0: Start Polarity for PBLK
Sequence #0: Toggle Position 1 for PBLK
Sequence #0: Toggle Position 2 for PBLK
Sequence #1: Start Polarity for PBLK
Sequence #1: Toggle Position 1 for PBLK
Sequence #1: Toggle Position 2 for PBLK
Sequence #2: Start Polarity for PBLK
Sequence #2: Toggle Position 1 for PBLK
Sequence #2: Toggle Position 2 for PBLK
Sequence #3: Start Polarity for PBLK
Sequence #3: Toggle Position 1 for PBLK
Sequence #3: Toggle Position 2 for PBLK
PBLK Sequence-Change Position #0
(Hard-Coded to 0)
PBLK Sequence Pointer for Region #0
PBLK Sequence-Change Position #1
PBLK Sequence Pointer for Region #1
PBLK Sequence-Change Position #2
PBLK Sequence Pointer for Region #2
PBLK Sequence-Change Position #3
PBLK Sequence Pointer for Region #3
Register Description
H1/H2 Polarity Control (0 = Inversion,
1 = No Inversion)
H1 Positive Edge Location
H1 Negative Edge Location
H3/H4 Polarity Control (0 = Inversion,
1 = No Inversion)
H3 Positive Edge Location
H3 Negative Edge Location
H1 Drive Strength (0 = Off, 1 = 3.5 mA,
2 = 7 mA, 3 = 10.5 mA, 4 = 14 mA,
5 = 17.5 mA, 6 = 21 mA, 7 = 24.5 mA)
H2 Drive Strength
H3 Drive Strength
H4 Drive Strength
RG Polarity Control (0 = Inversion,
1 = No Inversion)
RG Positive Edge Location
RG Negative Edge Location
RG Drive Strength (0 = Off, 1 = 3.5 mA,
2 = 7 mA, 3 = 10.5 mA, 4 = 14 mA,
5 = 17.5 mA, 6 = 21 mA, 7 = 24.5 mA)
SHP (Positive) Edge Sampling Location
SHD (Positive) Edge Sampling Location
REV. A