PI7C9X20404SLCFDE Pericom Semiconductor, PI7C9X20404SLCFDE Datasheet - Page 26

• Manufacturer Part Number: PI7C9X20404SLCFDE
• Description: IC PCIE PACKET SWITCH 128LQFP
• Manufacturer: Pericom Semiconductor
• Series: SlimLine™r

Specifications of PI7C9X20404SLCFDE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

July 2009 – Revision 1.2
Pericom Semiconductor
ADDRESS
20h
22h
24h
PCI CFG OFFSET
F0h (Port 0)
F0h: Bit [28]
80h (Port 0)
80h: Bit[21]
ECh (Port 0)
ECh: Bit [25:24]
84h (Port 0)
84h: Bit [14:13]
154h (Port 0)
154h: Bit [7:1]
E0h (Port1)
E0h: Bit [24]
F0h (Port 1)
F0h: Bit [28]
80h (Port 1)
80h: Bit[21]
ECh (Port 1)
ECh: Bit [25:24]
84h (Port 1)
84h: Bit [14:13]
154h (Port 1)
154h: Bit [7:1]
E0h (Port 2)
E0h: Bit [24]
F0h (Port 2)
F0h: Bit [28]
80h (Port 2)
80h: Bit[21]
ECh (Port 2)
ECh: Bit [25:24]
84h (Port 2)
84h: Bit [14:13]
154h (Port 2)
154h: Bit [7:1]
DESCRIPTION
Slot Clock Configuration for Port 0
Device specific Initialization for Port 0
Port Number for Port 0
PMCSR Data Scale for Port 0
Bit [7:6]: It represents the PMCSR Data Scale for physical port 0
VC0 TC/VC Map for Port 0
PCIe Capability Slot Implemented for Port 1
Slot Clock Configuration for Port 1
Device specific Initialization for Port 1
Port Number for Port 1
PMCSR Data Scale for Port 1
Bit [7:6]: It represents the PMCSR Data Scale for physical port 1
VC0 TC/VC Map for Port 1
PCIe Capability Slot Implemented for Port 2
Slot Clock Configuration for Port 2
Device specific Initialization for Port 2
Port Number for Port 2
PMCSR Data Scale for Port 2
Bit [7:6]: It represents the PMCSR Data Scale for physical port 2
VC0 TC/VC Map for Port 2
Page 26 of 77
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Bit [1]: When set, the component uses the clock provided on the
connector
Bit [2]: When set, the DSI is required
Bit [5:4]: It represents the logic port numbering for physical port
0
Bit [15:9]: When set, it indicates the corresponding TC is
mapped into VC0
Bit [0]: When set, the slot is implemented for Port 1
Bit [1]: When set, the component uses the clock provided on the
Bit [2]: When set, the DSI is required
Bit [5:4]: It represents the logic port numbering for physical port
1
Bit [15:9]: When set, it indicates the corresponding TC is
mapped into VC0
Bit [0]: When set, the slot is implemented for Port 2
Bit [1]: When set, the component uses the clock provided on the
Connector
Bit [2]: When set, the DSI is required
Bit [5:4]: It represents the logic port numbering for physical port
2
Bit [15:9]: When set, it indicates the corresponding TC is
mapped into VC0
Connector
4Port-4Lane PCI Express® Switch
SlimLine
PI7C9X20404SL
Datasheet
TM
Family