PI7C9X20404SLCFDE Pericom Semiconductor, PI7C9X20404SLCFDE Datasheet - Page 7

• Manufacturer Part Number: PI7C9X20404SLCFDE
• Description: IC PCIE PACKET SWITCH 128LQFP
• Manufacturer: Pericom Semiconductor
• Series: SlimLine™r

Specifications of PI7C9X20404SLCFDE

• Applications: Data Transport
• Interface: Advanced Configuration Power Interface (ACPI)
• Package / Case: 128-LQFP
• Mounting Type: Surface Mount
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Voltage - Supply: -

8
9
10 POWER MANAGEMENT ................................................................................................................................72
July 2009 – Revision 1.2
Pericom Semiconductor
9.1
9.2
9.3
9.4
9.5
CLOCK SCHEME .............................................................................................................................................68
IEEE 1149.1 COMPATIBLE JTAG CONTROLLER....................................................................................69
7.2.61
7.2.62
7.2.63
7.2.64
7.2.65
7.2.66
7.2.67
7.2.68
7.2.69
7.2.70
7.2.71
7.2.72
7.2.73
7.2.74
7.2.75
7.2.76
7.2.77
7.2.78
7.2.79
7.2.80
7.2.81
7.2.82
7.2.83
7.2.84
7.2.85
7.2.86
7.2.87
7.2.88
7.2.89
7.2.90
7.2.91
7.2.92
7.2.93
7.2.94
7.2.95
7.2.96
7.2.97
7.2.98
7.2.99
7.2.100
7.2.101
7.2.102
INSTRUCTION REGISTER ......................................................................................................................69
BYPASS REGISTER .................................................................................................................................69
DEVICE ID REGISTER.............................................................................................................................69
BOUNDARY SCAN REGISTER...............................................................................................................70
JTAG BOUNDARY SCAN REGISTER ORDER......................................................................................70
EEPROM CONTROL REGISTER – OFFSET DCh (Upstream Port Only)........................................49
EEPROM ADDRESS REGISTER – OFFSET DCh (Upstream Port Only).........................................50
EEPROM DATA REGISTER – OFFSET DCh (Upstream Port Only)................................................50
PCI EXPRESS CAPABILITY ID REGISTER – OFFSET E0h ............................................................50
NEXT ITEM POINTER REGISTER – OFFSET E0h ..........................................................................50
PCI EXPRESS CAPABILITIES REGISTER – OFFSET E0h..............................................................50
DEVICE CAPABILITIES REGISTER – OFFSET E4h .......................................................................51
DEVICE CONTROL REGISTER – OFFSET E8h...............................................................................52
DEVICE STATUS REGISTER – OFFSET E8h...................................................................................52
LINK CAPABILITIES REGISTER – OFFSET ECh............................................................................53
LINK CONTROL REGISTER – OFFSET F0h....................................................................................54
LINK STATUS REGISTER – OFFSET F0h ........................................................................................54
SLOT CAPABILITIES REGISTER (Downstream Port Only) – OFFSET F4h ...................................55
SLOT CONTROL REGISTER (Downstream Port Only) – OFFSET F8h...........................................56
SLOT STATUS REGISTER (Downstream Port Only) – OFFSET F8h ...............................................57
PCI EXPRESS ADVANCED ERROR REPORTING CAPABILITY ID REGISTER – OFFSET 100h.58
CAPABILITY VERSION – OFFSET 100h ..........................................................................................58
NEXT ITEM POINTER REGISTER – OFFSET 100h.........................................................................58
UNCORRECTABLE ERROR STATUS REGISTER – OFFSET 104h .................................................58
UNCORRECTABLE ERROR MASK REGISTER – OFFSET 108h ....................................................59
UNCORRECTABLE ERROR SEVERITY REGISTER – OFFSET 10Ch.............................................60
CORRECTABLE ERROR STATUS REGISTER – OFFSET 110 h......................................................60
CORRECTABLE ERROR MASK REGISTER – OFFSET 114 h .........................................................61
ADVANCE ERROR CAPABILITIES AND CONTROL REGISTER – OFFSET 118h.........................61
HEADER LOG REGISTER – OFFSET From 11Ch to 128h ..............................................................62
PCI EXPRESS VIRTUAL CHANNEL CAPABILITY ID REGISTER – OFFSET 140h (Upstream Only)
62
CAPABILITY VERSION – OFFSET 140h (Upstream Only) ..............................................................62
NEXT ITEM POINTER REGISTER – OFFSET 140h (Upstream Only).............................................62
PORT VC CAPABILITY REGISTER 1 – OFFSET 144h (Upstream Only) ........................................62
PORT VC CAPABILITY REGISTER 2 – OFFSET 148h (Upstream Only) ........................................63
PORT VC CONTROL REGISTER – OFFSET 14Ch (Upstream Only)...............................................63
PORT VC STATUS REGISTER – OFFSET 14Ch (Upstream Only)...................................................63
VC RESOURCE CAPABILITY REGISTER (0) – OFFSET 150h (Upstream Only)............................64
VC RESOURCE CONTROL REGISTER (0) – OFFSET 154h (Upstream Only) ...............................64
VC RESOURCE STATUS REGISTER (0) – OFFSET 158h (Upstream Only)....................................65
PORT ARBITRATION TABLE REGISTER (0) – OFFSET 180h-1BCh (Upstream Only)..................65
PCI EXPRESS POWER BUDGETING CAPABILITY ID REGISTER – OFFSET 20Ch ....................65
CAPABILITY VERSION – OFFSET 20Ch..........................................................................................65
NEXT ITEM POINTER REGISTER – OFFSET 20Ch ........................................................................66
DATA SELECT REGISTER – OFFSET 210h .................................................................................66
POWER BUDGETING DATA REGISTER – OFFSET 214h ..........................................................66
POWER BUDGET CAPABILITY REGISTER – OFFSET 218h .....................................................67
Page 7 of 77
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