SI5374B-A-GL Silicon Laboratories Inc, SI5374B-A-GL Datasheet - Page 55

• Manufacturer Part Number: SI5374B-A-GL
• Description: Clock Synthesizer / Jitter Cleaner QUAD DSPLL JITT ATT CLK LO LP BW 8IN/OUT
• Manufacturer: Silicon Laboratories Inc

Specifications of SI5374B-A-GL

• Package / Case: PBGA-80
• Input Level: LVCMOS
• Max Input Freq: 525 Hz
• Max Output Freq: 808 MHz
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Number Of Outputs: 8
• Output Level: LVCMOS
• Supply Current: 1100 mA
• Supply Voltage (max): 2.8 V
• Supply Voltage (min): - 0.5 V
• Lead Free Status / Rohs Status: Compliant

Note: Internal register names are indicated by italics, e.g., IRQ_PIN . See Si5374 Register Map.
Pin #
G1
G2
G8
G7
G3
G4
B2
A3
B3
E4
C8
A8
B8
C9
H7
H8
H9
H2
C2
D2
C3
D3
B7
B6
C7
C6
H3
H4
E2
C5
E8
H5
F8
F7
J7
J2
CKIN1N_C
CKIN1N_A
CKIN1N_B
CKIN2N_C
CKIN1N_D
CKIN2N_D
CKIN1P_A
CKIN2P_A
CKIN2N_A
CKIN1P_B
CKIN2P_B
CKIN2N_B
CKIN1P_C
CKIN2P_C
CKIN1P_D
CKIN2P_D
Pin Name
LOL_C
LOL_D
LOL_A
LOL_B
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
Table 9. Si5374 Pin Descriptions (Continued)
I/O
O
I
LVCMOS DSPLLq Loss of Lock Indicator.
Signal
Supply
Level
Multi
Preliminary Rev. 0.4
Differential input clocks. This input can also be driven with a sin-
gle-ended signal.
These pins function as the active high PLL loss of lock indicator if
the LOL_PIN register bit is set to 1.
0 = PLL locked.
1 = PLL unlocked.
If LOL_PINn = 0, this pin will tri-state. Active polarity is controlled
by the LOL_POLn bit. The PLL lock status will always be
reflected in the LOL_INTn read only register bit.
Ground for each DSPLLq.
Must be connected to system ground. Minimize the ground path
impedance for optimal performance of this device. See
recommended layout.
Clock Inputs for DSPLLq.
Description
Si5374
55