A3944KLPTR-T Allegro Microsystems Inc, A3944KLPTR-T Datasheet - Page 12

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A3944KLPTR-T

Manufacturer Part Number
A3944KLPTR-T
Description
IC PREDRIVER MOSFET 6CH TSSOP
Manufacturer
Allegro Microsystems Inc
Datasheet

Specifications of A3944KLPTR-T

Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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A3944
terminal. The voltage output capability of the current sources is
limited such that they cannot source current when the output volt-
age is greater than V
is less than V
The typical sink and source currents are shown graphically in
figure 4b.
When a channel is in the off-state the current generators source or
sink current through the DRNx terminal in an attempt to pull the
voltage at the terminal to the open load clamp voltage, V
resulting voltage at the DRNx terminal, V
test for a short to ground or an open load.
Normal Operation
If a load is present, the load supply is active, and there are no
shorts to ground, then the load will pull V
Figure 4a. Diagnostic Current Source Circuit
Figure 4b. Diagnostic Currents
–100
100
–20
–40
–60
–80
80
60
40
20
0
0
V
OCL
OCL
2
. The equivalent circuit is shown in figure 4a.
OCL
I
I
DPD
DPU
4
or sink current when the output voltage
GND
V
DRNx
6
(V)
I
DRNx
8
DRNx
DRNx
DRNx
NPD = 0
NPD = 1
, is measured to
above V
10
V
DRNx
OCL
OCL
12
I
I
DPD
DPU
Automotive, Low Side FET Pre-Driver
.
. The
V
and no fault is detected (see figure 3). If the NPD bit is zero then
the current sink will pull I
through the DRNx terminal, to V
The open load threshold, V
V
terminal and are common to all channels.
Short to Ground
If a short to ground is present, then V
the short circuit. V
old, V
The short detect threshold voltage, V
as a percentage of the voltage at the VREG terminal. The voltage
selection is determined by the SG bit (bit 0 of the fault configura-
tion register for the channel).
Open Load
If there is no short to ground or to supply, and the load is not con-
nected, then the current sources will pull V
load clamp voltage, V
but less than V
The time taken for V
fault condition depends on the current sourced from the DRNx
terminal and on the capacitance connected to the drain of the
FET. To avoid false fault detection at switch-off, the outputs
from the short to ground and open load comparators are ignored
during the off-state fault blank time, t
put drives low. One of four possible off-state fault blank times is
selected, per channel, through the TOF0
and TOF1 bits (bits 6 and 7 of the fault configuration register
for the channel).
To avoid false fault detection during supply transients, an addi-
tional fault filter masks faults that are present for less than the
off-state fault filter time, t
after the fault blank time.
The result is that directly after switch-off, a short to ground or
open load fault will not be detected until t
output is commanded to drive low. If a fault occurs after t
from switch-off then it must be present for at least t
is detected.
In some applications, for example when driving high efficiency
LEDs, the load may be sensitive to the pull down current used to
DRNx
OCL
, are a both a fixed percentage of the voltage at the VREG
STG
will then be greater than the open load threshold, V
, and a short to ground fault is reported (see figure 3).
OL
and an open load is reported (see figure 3).
DRNx
DRNx
OCL
will be less than the short detect thresh-
FF(off)
DPD
. V
to reach the correct value for an open
OL
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Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
DRNx
, and the open load clamp voltage,
from the supply through the load,
. This fault filter is only active
OCL
will then be greater than V
STG
DRNx
BL(off)
, is selected, per channel,
BL(off)
will be pulled low by
DRNx
, after the GATx out-
after the GATx
towards the open
FF(off)
BL(off)
before it
OL
STG
,
12

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