A3944KLPTR-T Allegro Microsystems Inc, A3944KLPTR-T Datasheet - Page 9

• Manufacturer Part Number: A3944KLPTR-T
• Description: IC PREDRIVER MOSFET 6CH TSSOP
• Manufacturer: Allegro Microsystems Inc

Specifications of A3944KLPTR-T

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

A3944
The A3944 provides a programmable interface between an ECU
and 6 low-side MOSFET switches in automotive applications.
Each channel provides all the features necessary to drive and
monitor the external FET and load.
The gate of the external FET is driven by a 50 Ω (typ) push-pull
driver capable of sourcing and sinking at least 50 mA under all
conditions. This is sufficient to allow most typically used FETs to
be switched with a PWM input at up to 10 kHz. The state of each
channel is determined by a combination of parallel and serial
inputs.
When the FET is active its drain is monitored for a short to
battery. When the FET is inactive, internal current sources are
activated and the drain voltage is monitored to check for shorts to
ground or open loads.
The serial, SPI compatible interface provides access to control
and configuration registers. Each channel has a dedicated fault
configuration register that allows independent fault thresholds,
fault timing, and fault configuration for each channel.
The output state of each channel is determined by the logic con-
trol input for the channel and a dedicated bit in the single output
control register. Channels can therefore be controlled by parallel
input, by serial input, or by a combination of the two. All chan-
nels can be switched at the same time with a single serial write.
A single fault mask register can be used to ignore the fault detect
output for any channel combination.
The serial interface also provides read back of the fault status for
each channel.
Digital inputs and outputs are compatible with 3.3 and 5 V sup-
plies.
Terminal Functions
VDD:
VBB:
battery voltage through reverse polarity protection.
VREG:
VDR:
GND:
external MOSFET source connections.
RESETN:
Positive supply for digital input, output, and logic.
Positive supply for voltage regulator. Can be connected to
Positive supply for gate drive outputs.
Ground return. Connect to common return point for all
Regulated voltage for analog and reference functions.
Active low digital input. When held low for longer
Functional Description
Automotive, Low Side FET Pre-Driver
than the minimum reset pulse width: forces outputs low, resets
the configuration, sets the LR bit, and resets all other channel
faults.
SI:
clocked into the serial register on the rising edge of SCK.
SO:
on SO, changing on the falling edge of SCK.
SCK:
for action.
CSN:
is low SO becomes active and data is accepted on SI. Data is
latched in the serial register when CSN goes high. When CSN is
high SO is high impedance and SI and SCK are ignored.
INx:
INx is high GATx is allowed to go high, depending the contents
of the serial control register and any active faults. When INx is
low GATx is held off.
GATx:
nected through a resistor or directly to the gate of the external
MOSFETs.
DRNx:
used to determine the status of the drive to the load.
Gate Drive Channels
Each gate drive channel has independent control logic, gate drive
output, fault detection circuitry, fault threshold generators, fault
timers, and fault configuration register. The fault configuration
register and reference generation provides two short to ground
thresholds and eight short to battery thresholds, plus four turn-on
blank times and four turn-off blank times independently select-
able per channel.
The gate drive channel block diagram (figure 1) shows the func-
tional circuit for one gate drive channel, which is duplicated in
each gate drive channel. A retry timer, common to all channels,
allows automatic retry for short to battery faults.
Control and Enable
A gate drive output, GATx, is turned-on when: RESETN is high,
no short to battery fault is present, and either the direct digital
input, INx, or the relevant bit in the serial control register, Gx, is
Active high digital input with pull-down resistor. Data on SI is
Push-pull digital output. Data from the fault register is output
Active high digital inputs with pull-down resistors. When
Active low digital input with pull-up resistor. When CSN
Digital clock input with pull-down resistor. See SI and SO
Gate drive outputs. Drive between GND and VDR. Con-
Analog, high-voltage inputs. Drain monitor connection
115 Northeast Cutoff
1.508.853.5000; www.allegromicro.com
Allegro MicroSystems, Inc.
Worcester, Massachusetts 01615-0036 U.S.A.
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