KSZ8041TL A3 Micrel Inc, KSZ8041TL A3 Datasheet - Page 60

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KSZ8041TL A3

Manufacturer Part Number
KSZ8041TL A3
Description
Manufacturer
Micrel Inc
Datasheet

Specifications of KSZ8041TL A3

Lead Free Status / Rohs Status
Supplier Unconfirmed
Micrel, Inc.
KSZ8041TL/FTL/MLL
Reset Circuit
The following reset circuit is recommended for powering up the KSZ8041TL/FTL/MLL if reset is triggered by the power
supply.
3.3V
D1: 1N4148
D1
R 10K
KSZ8041TL/FTL/M LL
RST#
C 10uF
Figure 23. Recommended Reset Circuit
The following reset circuit is recommended for applications where reset is driven by another device (e.g., CPU or FPGA).
At power-on-reset, R, C and D1 provide the necessary ramp rise time to reset the KSZ8041TL/FTL/MLL device. The
RST_OUT_n from CPU/FPGA provides the warm reset after power up.
3.3V
R 10K
D1
KSZ8041TL/FTL/MLL
CPU/FPGA
RST#
RST_OUT_n
D2
C 10uF
D1, D2: 1N4148
Figure 24. Recommended Reset Circuit for Interfacing with CPU/FPGA Reset Output
December 2009
60
M9999-120909-1.2

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