TDA9109A STMicroelectronics, TDA9109A Datasheet - Page 27

• Manufacturer Part Number: TDA9109A
• Manufacturer: STMicroelectronics

Specifications of TDA9109A

• Operating Temperature (min): 0C
• Operating Temperature (max): 70C
• Operating Temperature Classification: Commercial
• Lead Free Status / Rohs Status: Supplier Unconfirmed

OPERATING DESCRIPTION
1 GENERAL CONSIDERATIONS
1.1 Power Supply
The typical values of the power supply voltages
V
mum operation is obtained for V
and 13.2 V and V
In order to avoid erratic operation of the circuit dur-
ing the transient phase of VCC switching on, or off,
the value of V
7.5 V typ., the outputs of the circuit are inhibited.
Similarly, before V
ister are reset to their default value (see I
trol Table).
In order to have very good power supply rejection,
the circuit is internally supplied by several voltage
references (typ. value: 8.2 V). Two of these volt-
age references are externally accessible, one for
the vertical and one for the horizontal part. They
can be used to bias external circuitry (if I
less than 5 mA). It is necessary to filter the voltage
references by external capacitors connected to
ground, in order to minimize the noise and conse-
quently the “jitter” on vertical and horizontal output
signals.
1.2 I
TDA9109A belongs to the I
family. Instead of being controlled by DC voltages
on dedicated control pins, each adjustment can be
done via the I
The I
input. The general function and the bus protocol
are specified in the Philips-bus data sheets.
The interface (Data and Clock) is a comparator
whose threshold is 2.2 V with a 5 V supply. Spikes
of up to 50 ns are filtered by an integrator and the
maximum clock speed is limited to 400 kHz.
The data line (SDA) can be used bidirectionally. In
read-mode the IC sends reply information
(1 byte) to the micro-processor.
The bus protocol prescribes a full-byte transmis-
sion in all cases. The first byte after the start con-
dition is used to transmit the IC-address (hexa 8C
for write, 8D for read).
CC
2
and V
2
C Control
C bus is a serial bus with a clock and a data
DD
2
are 12 V and 5 V respectively. Opti-
CC
C Interface.
DD
is monitored: if V
DD
between 4.5 and 5.5 V.
reaches 4 V, all the I
2
C controlled device
CC
CC
between 10.8
is less than
2
LOAD
2
C Con-
C reg-
is
1.3 Write Mode
In write mode the second byte sent contains the
subaddress of the selected function to adjust (or
controls to affect) and the third byte the corre-
sponding data byte. It is possible to send more
than one data byte to the IC. If after the third byte
no stop or start condition is detected, the circuit in-
crements automatically by one the momentary
subaddress in the subaddress counter (auto-incre-
ment mode). So it is possible to transmit immedi-
ately the following data bytes without sending the
IC address or subaddress. This can be useful to
reinitialize all the controls very quickly (flash man-
ner). This procedure can be finished by a stop con-
dition.
The circuit has 18 adjustment capabilities: 3 for the
horizontal part, 4 for the vertical, 3 for the
E/W correction, 2 for the dynamic horizontal phase
control, 2 for the vertical and horizontal Moiré op-
tions, 3 for the horizontal and the vertical dynamic
focus and 1 for the B+ reference adjustment.
18 bits are also dedicated to several controls (ON/
OFF, Horizontal Forced Frequency, Sync Priority,
Detection Refresh and XRAY reset).
1.4 Read Mode
During the read mode the second byte transmits
the reply information.
The reply byte contains the horizontal and vertical
lock/unlock status, the XRAY activation status
and, the horizontal and vertical polarity detection.
It also contains the sync detection status which is
used by the MCU to assign the sync priority. A
stop condition always stops all the activities of the
bus decoder and switches to high impedance both
the data and clock line (SDA and SCL).
See I
1.5 Sync Processor
The internal sync processor allows the TDA9109A
to accept:
•
•
separated horizontal & vertical TTL-
compatible sync signal
composite horizontal & vertical TTL-
compatible sync signal
2
C subaddress and control tables.
TDA9109A
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