TDA4856 NXP Semiconductors, TDA4856 Datasheet - Page 10

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TDA4856

Manufacturer Part Number
TDA4856
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of TDA4856

Operating Supply Voltage (typ)
12/15V
Operating Supply Voltage (max)
16V
Operating Temp Range
-20C to 70C
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
32
Lead Free Status / Rohs Status
Compliant

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Philips Semiconductors
Adjustment of vertical position, vertical linearity and
vertical linearity balance
Register VOFFS provides a DC shift at the sawtooth
output VOUT1 and VOUT2 (pins 13 and 12) without
affecting any other output waveform. This adjustment is
meant for factory alignments.
Register VPOS provides a DC shift at the sawtooth output
VOUT1 and VOUT2 with correct tracking of all other
related waveforms (see Section “Tracking of vertical
adjustments”). This register should be used for user
adjustments. Due to the tracking the whole picture moves
vertically while maintaining the correct geometry.
Register VLIN is used to adjust the amount of vertical
S-correction in the output signal. This function can be
switched off by control bit VSC.
Register VLINBAL is used to correct the unbalance of
vertical S-correction in the output signal.
Tracking of vertical adjustments
The adjustments via registers VSIZE, VOVSCN and
VPOS also affect the waveforms of horizontal pincushion,
vertical linearity (S-correction), vertical linearity balance,
focus parabola, pin unbalance and parallelogram
correction. The result of this interaction is that no
readjustment of these parameters is necessary after an
user adjustment of vertical picture size and vertical picture
position.
Adjustment of vertical moire cancellation
To achieve a cancellation of vertical moire (also known as
‘scan moire’) the vertical picture position can be modulated
by half the vertical frequency. The amplitude of the
modulation is controlled by register VMOIRE and can be
switched off via control bit MOD.
Horizontal pincushion (including horizontal size,
corner correction and trapezium correction)
EWDRV (pin 11) provides a complete EW drive waveform.
The components horizontal pincushion, horizontal size,
corner correction and trapezium correction are controlled
by the registers HPIN, HSIZE, HCORT, HCORB and
HTRAP.
The corner correction can be adjusted separately for the
top (HCORT) and bottom (HCORB) part of the picture.
The pincushion (EW parabola) amplitude, corner and
trapezium correction track with vertical picture size
(VSIZE) and also with the adjustment for vertical picture
2003 Sep 30
I
PC monitors
2
C-bus autosync deflection controller for
10
position (VPOS). The corner correction does not track with
horizontal pincushion (HPIN).
Further the horizontal pincushion amplitude, corner and
trapezium correction track with the horizontal picture size,
which is adjusted via register HSIZE and the analog
modulation input HSMOD. If the DC component in the
EWDRV output signal is increased via HSIZE or I
the pincushion, corner and trapezium component of the
EWDRV output will be reduced by a factor of
The value 14.4 V is a virtual voltage for calculation only.
The output pin can not reach this value, but the gain (and
DC bias) of the external application should be such that the
horizontal deflection is reduced to zero when EWDRV
would reach 14.4 V.
HSMOD (pin 31) can be used for a DC controlled EHT
compensation by correcting horizontal size, horizontal
pincushion, corner and trapezium. The control range at
this pin tracks with the actual value of HSIZE. For an
increasing DC component V
signal, the DC component V
reduced by a factor of
above.
The whole EWDRV voltage is calculated as follows:
where:
1
V
V
f HSIZE
g HSIZE,HSMOD
h I
+
(
(
(
EWDRV
HEHT
h I
HREF
V
V
------------------------------------------------------------------------ -
(
HPIN
HREF
HSIZE
=
)
)
=
=
+
)
------------------- -
120 A
=
I
+
HSMOD
V
1.2 V
----------------------------------------- -
I
1
HREF at f = 70 kHz
V
HCOR
HEHT
14.4 V
V
---------------- -
14.4 V
I
+
HSIZE
HREF
)
+
=
0.69
1
V
V
1
HSIZE
HTRAP
1
V
---------------- -
14.4 V
HSIZE
V
---------------- -
14.4 V
V
------------------------------------------------------------------------ -
HSIZE
HSIZE
+
HEHT
HSIZE
V
HEHT
g HSIZE,HSMOD
(
caused by I
as shown in the equation
+
in the EWDRV output
V
14.4 V
HEHT
Product specification
f(HSIZE)
TDA4856
1
HSMOD
V
---------------- -
14.4 V
HSIZE
)
HSMOD
will be
,

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