MB91F376G Fujitsu Components, MB91F376G Datasheet - Page 199

• Manufacturer Part Number: MB91F376G
• Manufacturer: Fujitsu Components

Specifications of MB91F376G

• Lead Free Status / Rohs Status: Not Compliant

Addresses in the table are the values in the CPU memory space. All addresses and data are hexadecimal values,
where x is any value and
* : Two Read/Reset commands reset Flash memory to the read mode.
(6) Automatic write/erase
Read/
Reset*
Read/
Reset*
Write
Chip Erase
Sector
Erase
Sector Erase
Suspend
Sector Erase
Resume
Command
Sequence
Irrespective of the Flash Memory mode or other modes, writing to/erasing the flash memory unit is performed
by starting the flash memory automatic algorithm.
To start the automatic algorithm, various sequences of write accesses are executed in 1 to 6 cycles. They are
called Flash commands.
a : Flash commands
There are four commands for starting the automatic algorithm of the Flash Memory unit; Read/Reset, Write,
Chip Erase, and Sector Erase. There are also Erase Suspend and Erase Resume commands for the sector
erase operation.
Next tables give the command sequence lists in the flash memory and other modes.
b : Command sequence
Cycle
Write
Bus
of
1
4
4
6
6
Input of address
Input of address
Address
**5554
**5554
**5554
**5554
**xxxx
of First Bus
Write Cycle
**
may be 08 to 0F.
xxAA
xxAA
xxAA
xxAA
xxF0
Data
Command Sequence List (CPU access)
Write Cycle of
Address
**aaa8
**aaa8
*
**aaa8
Second Bus
*
aaa8
**
**
⎯
xxxx or data (xxB0
xxxx or data (xx30
xx55
xx55
xx55
xx55
Data
⎯
Address
**5554
**5554
**5554
**5554
of Third Bus
Write Cycle
⎯
H
H
) suspends and resumes sector erasing.
) suspends sector erasing.
xxF0
xxA0
xx80
xx80
Data
⎯
Address
**5554
**5554
(even)
Read/ Write
Fourth Bus
RA
PA
⎯
Cycle of
MB91360G Series
xxAA
xxAA
word)
(half
Data
RD
PD
⎯
Address
**aaa8
**aaa8
of Fifth Bus
Write Cycle
⎯
⎯
⎯
xx55
xx55
Data
⎯
⎯
⎯
Address
**5554
(even)
of Sixth Bus
Write Cycle
SA
⎯
⎯
⎯
xx10
xx30
Data
⎯
⎯
⎯
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