LH28F640SPHT-PTLZ7 Sharp Electronics, LH28F640SPHT-PTLZ7 Datasheet - Page 12

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LH28F640SPHT-PTLZ7

Manufacturer Part Number
LH28F640SPHT-PTLZ7
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F640SPHT-PTLZ7

Cell Type
NOR
Density
64Mb
Access Time (max)
120ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
23/22Bit
Operating Supply Voltage (typ)
3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
8M/4M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LH28F640SPHT-PTLZ7
Manufacturer:
SHARP
Quantity:
945
NOTES:
1. Refer to DC Characteristics. When V
2. X can be V
3. Refer to Table 2 to determine whether the device is selected or de-selected depending on the state of CE
4. DQ refers to DQ
5. RP# at GND±0.2V ensures the lowest power consumption.
6. Command writes involving block erase, (page buffer) program, block lock configuration or OTP program are reliably
7. Refer to Table 5 for valid D
8. Never hold OE# low and WE# low at the same timing.
9. Refer to Appendix of LH28F640SP series for more information about query code.
10. STS is V
Read Array
Output Disable
Standby
Reset
Read Identifier
Codes/OTP
Read Query
Write
Refer to DC Characteristics for V
executed when V
program algorithms. It is High Z during when the WSM is not busy, in block erase suspend mode (with program and page
buffer program inactive), (page buffer) program suspend mode, or reset mode.
Mode
OL
IL
or V
when the WSM (Write State Machine) is executing internal block erase, (page buffer) program or OTP
15
PEN
IH
-DQ
Notes
6,7,8
8,9
for control pins and addresses, and V
=V
8
5
8
0
PENH
in word mode (BYTE#=V
IN
RP#
V
V
V
V
V
V
V
and V
during a write operation.
IH
IH
IH
IL
IH
IH
IH
PENLK
CC
CE
PEN
Disabled
Enabled
Enabled
Enabled
Enabled
Enabled
=2.7V-3.6V.
0,1,2
and V
≤V
X
Table 4. Bus Operation
PENLK
(3)
PENH
, memory contents can be read, but cannot be altered.
IH
OE#
V
V
V
V
V
X
X
voltages.
LHF64P05
IH
IH
IL
IL
IL
: ×16 bit) and DQ
PENLK
WE#
V
V
V
V
V
X
X
IH
IH
IH
IH
IL
or V
(1, 2)
Appendix
PENH
Address
Refer to
Table 3
7
-DQ
See
X
X
X
X
X
for V
0
in byte mode (BYTE#=V
PEN
V
.
PEN
X
X
X
X
X
X
X
Appendix
Refer to
Table 3
High Z
High Z
High Z
DQ
D
D
See
OUT
IN
(4)
0
IL
, CE
STS
High Z
: ×8 bit).
X
X
X
X
X
X
1
Rev. 0.06
(10)
and CE
9
2
.

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