CY7C1354B-166AI Cypress Semiconductor Corp, CY7C1354B-166AI Datasheet - Page 16

• Manufacturer Part Number: CY7C1354B-166AI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1354B-166AI

• Density: 9Mb
• Access Time (max): 3.5ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 166MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 18b
• Package Type: TQFP
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 180mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Word Size: 36b
• Number Of Words: 256K
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05114 Rev. *C
Scan Register Sizes
Identification Codes
Boundary Scan Exit Order (×36)
Instruction
Bypass
ID
Boundary Scan
EXTEST
IDCODE
SAMPLE Z
RESERVED
SAMPLE/PRELOAD 100
RESERVED
RESERVED
BYPASS
Instruction
Bit #
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Register Name
1
2
3
4
5
6
7
8
9
119-Ball ID
000
001
010
011
101
110
111
Code
M4
K4
H4
B4
G4
C3
B3
D6
H7
G6
E6
D7
E7
G7
H6
K7
N6
P7
N7
F4
F6
T7
L6
Captures the Input/Output ring contents. Places the boundary scan register between the TDI and
TDO. Forces all SRAM outputs to High-Z state. This instruction is not 1149.1-compliant.
Loads the ID register with the vendor ID code and places the register between TDI and TDO. This
operation does not affect SRAM operation.
Captures the Input/Output contents. Places the boundary scan register between TDI and TDO.
Forces all SRAM output drivers to a High-Z state.
Do Not Use: This instruction is reserved for future use.
Captures the Input/Output ring contents. Places the boundary scan register between TDI and TDO.
Does not affect the SRAM operation. This instruction does not implement 1149.1 preload function
and is therefore not 1149.1-compliant.
Do Not Use: This instruction is reserved for future use.
Do Not Use: This instruction is reserved for future use.
Places the bypass register between TDI and TDO. This operation does not affect SRAM operation.
Bit Size
165-Ball ID
32
69
3
1
M10
B10
G10
D10
G11
A10
C11
E10
F10
D11
E11
F11
H11
K10
L10
J10
J11
B6
B7
A7
B8
A8
A9
Boundary Scan Exit Order (×36)
Bit #
Description
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
119-Ball ID
M6
K6
P6
A3
C5
B5
A5
C6
A6
P4
N4
R6
R2
R3
P2
P1
K1
N2
L7
T4
T5
T3
L2
CY7C1356B
CY7C1354B
(continued)
165-Ball ID
Page 16 of 29
M11
R10
K11
N11
R11
P10
L11
M2
R9
R8
R6
R4
R3
R1
N1
P9
P8
P6
P4
P3
L2
K2
J2
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