P80C592FFA NXP Semiconductors, P80C592FFA Datasheet - Page 15

• Manufacturer Part Number: P80C592FFA
• Manufacturer: NXP Semiconductors

Specifications of P80C592FFA

• Cpu Family: 80C
• Device Core: 80C51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Interface Type: CAN/UART
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 40
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 68
• Package Type: PLCC
• Lead Free Status / Rohs Status: Compliant

Philips Semiconductors
8
The P8xC592 has six 8-bit parallel ports: Port 0 to Port 5. In addition to the standard 8-bit parallel ports, the I/O facilities
also include a number of special I/O lines. The use of a Port 1, Port 3 or Port 4 pins as an alternative function is carried
out automatically provided the associated SFR bit is set HIGH.
Table 5 Default Port functions
Table 6 Alternative Port functions
1996 Jun 27
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
PORT TYPE
PORT TYPE
8-bit microcontroller with on-chip CAN
I/O PORT STRUCTURE
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I
The same as in the 80C51
Parallel l/O port
Parallel input port with an input function only
Multiplexed Low-order address and
Data bus for external memory (AD7 to AD0)
Capture timer inputs for Timer T2
(CT0I to CT3I), or
External interrupt request inputs
(INT2 to INT5)
T2 event input (T2)
T2 timer reset input (RT2)
CAN transmitter output 0 (CTX0)
CAN transmitter output 1 (CTX1)
High-order address byte for external memory
(A08 to A15)
Serial Input Port (RXD)
Serial Output Port (TXD)
External interrupt (INT0)
External interrupt (INT1)
Timer 0 external input (T0)
Timer 1 external input (T1)
External data memory Write strobe (WR)
External data memory Read strobe (RD)
Compare and Set/Reset outputs
(CMSR0 to CMSR5)
Compare and toggle outputs (CMT0, CMT1)
Input channels to ADC (ADC7 to ADC0)
FUNCTION
FUNCTION
15
Except for the additional functions of P1.6 and
P1.7.
Parallel I/O function is identical to Port1, 2 and 3.
May be used as normal inputs if the ADC function
is inoperative.
Provides the multiplexed Low-order address and
data bus used for expanding the P8xC592 with
standard memories and peripherals.
External interrupt request inputs, if capture
information is not utilized.
External counter input.
External counter reset input.
CTX0 and CTX1 outputs of the CAN interface
(note 1).
Port 2 provides the High-order address bus when
the P8xC592 is expanded with external Program
Memory and/or external Data Memory.
Receiver input of serial port SIO0 (UART).
Transmitter output of serial port SIO0 (UART).
External interrupt request inputs.
Counter inputs.
Control signal to write to external Data Memory.
Control signal to read from external Data Memory.
Can be configured to provide signals indicating a
match between Timer counter T2 and its compare
registers.
Port 5 may be used in conjunction with the ADC
interface (note 2).
REMARKS
REMARKS
Product specification
P8xC592