CY7B991-2JCT Cypress Semiconductor Corp, CY7B991-2JCT Datasheet - Page 3

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CY7B991-2JCT

Manufacturer Part Number
CY7B991-2JCT
Description
Manufacturer
Cypress Semiconductor Corp
Type
Zero Delay Programmable PLL Clock Bufferr
Datasheet

Specifications of CY7B991-2JCT

Number Of Elements
1
Supply Current
85mA
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
PLCC
Output Frequency Range
3.75 to 80MHz
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Pin Count
32
Lead Free Status / Rohs Status
Not Compliant
Pinouts
Table 1. Pin Definition
Document Number: 38-07138 Rev. *E
REF
FB
FS
1F0, 1F1
2F0, 2F1
3F0, 3F1
4F0, 4F1
TEST
1Q0, 1Q1
2Q0, 2Q1
3Q0, 3Q1
4Q0, 4Q1
V
V
GND
Signal Name
CCN
CCQ
PWR
PWR
PWR
IO
O
O
O
O
I
I
I
I
I
I
I
I
Reference frequency input. This input supplies the frequency and timing against which all functional
variations are measured.
PLL feedback input (typically connected to one of the eight outputs).
Three level frequency range select. See
Three level function select inputs for output pair 1 (1Q0, 1Q1). See
Three level function select inputs for output pair 2 (2Q0, 2Q1). See
Three level function select inputs for output pair 3 (3Q0, 3Q1). See
Three level function select inputs for output pair 4 (4Q0, 4Q1). See
Three level select. See
Output pair 1. See
Output pair 2. See
Output pair 3. See
Output pair 4. See
Power supply for output drivers.
Power supply for internal circuitry.
Ground.
Figure 1. Pin Configuration – 32-Pin PLCC/LCC Package
V
V
GND
GND
4Q1
4Q0
CCQ
3F1
4F0
4F1
CCN
Table
Table
Table
Table
5
6
7
8
9
10
11
12
13
14
4
“Test Mode”
3.
3.
3.
3.
15
3
16
2
CY7B991
CY7B992
17
1
on page 5 under the
18 19 20
32 31 30
Table
Description
2.
29
28
27
26
25
24
23
22
21
2F0
GND
1F1
1F0
V
1Q0
1Q1
GND
GND
CCN
“Block Diagram Description”
Table
Table
Table
Table
3.
3.
3.
3.
on page 4.
CY7B991
CY7B992
Page 3 of 20
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