AD6650BBC Analog Devices Inc, AD6650BBC Datasheet - Page 17

• Manufacturer Part Number: AD6650BBC
• Manufacturer: Analog Devices Inc

Specifications of AD6650BBC

• Operating Temperature (max): 85C
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (typ): 3.3V
• Lead Free Status / Rohs Status: Not Compliant

Coarse DC Correction
The coarse dc correction block is a simple integrate-and-dump
that integrates the data for 16,384 cycles at the ADC clock rate
(typically 26 MSPS) and then updates an estimate of the dc. This
estimate is then subtracted from the signal path. The signal is
clipped after the subtraction to avoid numerical wrap around
with large signals.
The −32 dBFS to −35 dBFS uncorrected offset is sufficient to
demodulate large signals, but it does not leave any margin if
30 dB of signal-to-dc is desired. It is essential to consider the dc
offset of the signal at the point where the AGC of the AD6650
begins to range. This is important because once the signal or a
blocker is in the range of the AGC loop, the dc signal that appears
at the output of the AD6650 is modulated by the change in gain
of the loop. If the gain decreases, the signal at the output remains
at the same power level due to the digital relinearization, but the
dc signal at the output is gained up by the relinearization process.
For this reason, the coarse dc correction is used to provide addi-
tional correction before relinearizing the data to provide additional
margin. This block gains another 5 dB to 8 dB (sometimes up to
25 dB) of dc rejection that provides additional margin.
The coarse dc correction is provided for two reasons:
•
•
FOURTH-ORDER CASCADED INTEGRATOR COMB
FILTER (CIC4)
The CIC4 processing stage implements a fixed-coefficient
decimating filter. It reduces the sample rate of the signal and
allows subsequent filtering stages to be implemented more
efficiently. The input of the CIC4 is driven by the 19-bit relinearized
data at a maximum input rate of 26 MHz (52 MHz clock rate).
The CIC4 decimation ratio, M
8 to 32 (all integer values). The CIC4 scale factor, S
programmable unsigned integer between 0 and 8. It serves to
control the attenuation of the data into the CIC4 stage in 6 dB
increments such that the CIC4 does not overflow. Because this
scale factor is in 6 dB steps, the CIC4 filter has a gain between
0 dB and −6.02 dB when properly scaled. For the best dynamic
range, S
attenuation) without creating an overflow condition.
The value of 12 that is subtracted in Equation 4 comes from the
amount of scaling needed to compensate for the minimum
decimation of 8. The frequency response of the CIC4 filter is
To provide additional margin on the carrier-to-dc term for
large input signals.
To provide more range for the fine dc correction upper
threshold by decreasing the total input power to the block
for small input signals. (This is described in more detail in
the Fine DC Correction section.)
CIC
S
CIC
CIC4
4
_
=
Gain
should be set to the smallest value possible (lowest
Ceil
=
(
4
2
×
M
S
CIC
log
CIC
4
+
4
2
12
(
4
M
CIC
CIC4
4
)
, can be programmed from
)
−
12
CIC4
, is a
Rev. A | Page 17 of 44
(4)
(5)
given by Equation 6 and Equation 7. The gain and pass-band
droop of the CIC4 can be calculated using these equations. If the
gain and/or droop of the CIC4 filter are not acceptable, they can
be compensated for in the programmable RCF filter stage.
The output rate of this stage is given by Equation 8.
CIC4 Rejection
Table 10 shows the amount of bandwidth as a percentage of the
input sample rate (ADC sample rate) that can be protected with
various decimation rates and alias rejection specifications. The
maximum input rate into the CIC4 is 26 MHz. Table 10 shows
the half-bandwidth characteristics of the CIC4.
Table 10. SSB CIC4 Alias Rejection Table
Rate
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Table 10 enables the calculation of an upper bound on the
decimation ratio (M
and input sample rate.
CIC
CIC
4
4
f
( )
( )
SAMP
Z
f
−50
2.494
2.224
2.006
1.827
1.676
1.549
1.439
1.344
1.261
1.187
1.122
1.063
1.010
0.962
0.919
0.879
0.842
0.809
0.778
0.749
0.722
0.697
0.674
0.653
0.632
=
=
4
⎛
⎜
⎜
⎜
⎜
⎜
⎝
⎛
⎜
⎜
⎝
≤
M
M
M
CIC
1
CIC
1
f
ADC
CIC
4
4
−60
1.921
1.713
1.546
1.408
1.292
1.194
1.110
1.037
0.972
0.916
0.865
0.820
0.779
0.742
0.709
0.678
0.650
0.624
0.600
0.578
0.557
0.538
0.520
0.503
0.488
4
×
×
CIC4
1
sin
−
), given the desired filter characteristics
1
sin
⎛
⎜
⎜
⎝
Z
−
π
−
Z
⎛
⎜
⎜
⎝
×
M
1.473
1.315
1.187
1.081
0.992
0.917
0.852
0.796
0.747
0.703
0.665
0.630
0.599
0.570
0.544
0.521
0.499
0.479
0.461
0.444
0.428
0.413
0.400
0.387
0.375
−70
π
−
CIC
1
f
×
4
×
f
f
⎞
⎟
⎟
⎠
M
ADC
ADC
4
f
dB
×
CIC
−80
1.128
1.007
0.909
0.828
0.760
0.703
0.653
0.610
0.572
0.539
0.509
0.483
0.459
0.437
0.417
0.399
0.383
0.367
0.353
0.340
0.328
0.317
0.306
0.297
0.287
⎞
⎟
⎟
⎠
CIC
4
⎞
⎟
⎟
⎠
⎞
⎟
⎟
⎟
⎟
⎟
⎠
_
4
Gain
×
CIC
−90
0.860
0.768
0.693
0.632
0.580
0.536
0.499
0.466
0.437
0.411
0.389
0.369
0.350
0.334
0.319
0.305
0.292
0.281
0.270
0.260
0.251
0.242
0.234
0.226
0.219
AD6650
_
Gain
−100
0.651
0.581
0.525
0.478
0.439
0.406
0.378
0.353
0.331
0.312
0.295
0.279
0.265
0.253
0.241
0.231
0.221
0.212
0.204
0.197
0.190
0.183
0.177
0.171
0.166
(6)
(7)
(8)