LMX9830SM National Semiconductor, LMX9830SM Datasheet - Page 25

• Manufacturer Part Number: LMX9830SM
• Manufacturer: National Semiconductor

Specifications of LMX9830SM

• Lead Free Status / Rohs Status: Not Compliant

lower limit of the modulation deviation, this will yield the best
possible phase noise.
Even further out from the carrier, the phase noise will be
mainly dominated by the VCO noise assuming the crystal is
relatively clean.
These equations are approximations of the ones used by
Webench to calculate phase noise and lock-time.
10.9.3 Practical Optimization
In an example where frequency drift and drift rate can be im-
proved though loop filter tweaks, consider the results taken
Results below were taken on the same board with three loop
filter values changed. C2 and R2 have been increased in val-
ue and C1 has been reduced. The drift rate has improved by
The effect of changing these three components is to reduce
the loop bandwidth which reduces the phase noise. The re-
duction in this noise level corresponds directly to the reduction
of noise in the payload area where drift is measured. This
noise reduction comes at the expense of lock-time which can
be increased to 120 µs without suffering any ill effects, how-
ever if we continue to reduce the loop BW further the lock-
time will increase such that the PLL does not have time to lock
before data transmission and the drift will again increase. Be-
fore the lock-time goes out of spec, the modulation index will
start to fall since it is being cut by the reducing loop BW.
TRM/CA/09/C (Carrier Drift
Hoppong On- Low Channel
Drift Rate/50 μs
Max Drift
Average Drift
Packets Tested
Packets Failed
Overall Result
TRM/CA/09/C (Carrier Drift
Hoppong On- Low Channel
Drift Rate/50 μs
Max Drift
Average Drift
Packets Tested
Packets Failed
Overall Result
26.1 kHz
25 kHz
−1 kHz
10
2
Failed
−13.6 kHz
15 kHz
3 kHz
10
0
Passed
DH1
DH1
DH3
N/A
N/A
N/A
N/A
N/A
N/A
DH3
N/A
N/A
N/A
N/A
N/A
N/A
25
−15.6 kHz
21 kHz
1 kHz
10
0
Passed
−30.5 kHz
36 kHz
12 kHz
10
10
Failed
Lock-time is dependent on three factors, the loop bandwidth,
the maximum frequency jump that the PLL must make and
the final tolerance to which the frequency must settle. As a
rule-of-thumb it is given by:
below. The drift rate is 26.1 kHz per 50μs and the maximum
drift is 25 kHz for DH1 packets, both of which are exceeding
or touching the Bluetooth pass limits. These measurements
are taken with component values shown above.
13 kHz per 50 µs and the maximum drift has improved by 10
kHz.
Therefore a compromise has to be found between lock-time,
phase noise and modulation, which yields best performance.
Note: The values shown in the LMX9830 datasheet, are the best case op-
Another example of how the loop filter values can affect fre-
quency drift rate, these results below show the DUT with
maximum drift on mid and high channels failing. Adjusting the
loop bandwidth as shown provides the improvement required
to pass qualification.
DH5
DH5
timized values that have been shown to produce the best overall
results and are recommended as a starting point for this design.
±20 kHz
DHI: ±25 kHz
DH3: ±40 kHz
D5I: ±40 kHz
±20 kHz
DHI: ±25 kHz
DH3: ±40 kHz
D5I: ±40 kHz
20180048
Limits
Limits
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