DSPD56367AG150 Freescale Semiconductor, DSPD56367AG150 Datasheet - Page 13

• Manufacturer Part Number: DSPD56367AG150
• Description: DSP Fixed-Point 24-Bit 150MHz 150MIPS 144-Pin LQFP Tray
• Manufacturer: Freescale Semiconductor

Specifications of DSPD56367AG150

• Package: 144LQFP
• Numeric And Arithmetic Format: Fixed-Point
• Maximum Speed: 150 MHz
• Ram Size: 69 KB
• Device Million Instructions Per Second: 150 MIPS

Freescale Semiconductor
Signal Name
HWR/
PB10
HRD/
PB11
HDS/
HWR
PB12
HRW
HRD
HDS
HA2
HA9
Input, Output, or
Input, Output, or
Input, Output, or
Disconnected
Disconnected
Disconnected
Type
Input
Input
Input
Input
Input
Input
Disconnected
Disconnected
Disconnected
State During
Reset
GPIO
GPIO
GPIO
Table 2-9 Host Interface (continued)
DSP56367 Technical Data, Rev. 2.1
Host Address Input 2—When the HDI08 is programmed to interface a
non-multiplexed host bus and the HI function is selected, this signal is line 2
of the host address (HA2) input bus.
Host Address 9—When HDI08 is programmed to interface a multiplexed host
bus and the HI function is selected, this signal is line 9 of the host address
(HA9) input bus.
Port B 10—When the HDI08 is configured as GPIO, this signal is individually
programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 3.3V tolerant.
Host Read/Write—When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this signal is the
Host Read/Write (HRW) input.
Host Read Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this signal is the
host read data strobe (HRD) Schmitt-trigger input. The polarity of the data
strobe is programmable, but is configured as active-low (HRD) after reset.
Port B 11—When the HDI08 is configured as GPIO, this signal is individually
programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 3.3V tolerant.
Host Data Strobe—When HDI08 is programmed to interface a
single-data-strobe host bus and the HI function is selected, this signal is the
host data strobe (HDS) Schmitt-trigger input. The polarity of the data strobe
is programmable, but is configured as active-low (HDS) following reset.
Host Write Data—When HDI08 is programmed to interface a
double-data-strobe host bus and the HI function is selected, this signal is the
host write data strobe (HWR) Schmitt-trigger input. The polarity of the data
strobe is programmable, but is configured as active-low (HWR) following
reset.
Port B 12—When the HDI08 is configured as GPIO, this signal is individually
programmed as input, output, or internally disconnected.
The default state after reset for this signal is GPIO disconnected.
This input is 3.3V tolerant.
Signal Description
Parallel Host Interface (HDI08)
2-9