LTC4271IUF#PBF Linear Technology, LTC4271IUF#PBF Datasheet - Page 28

LTC4271IUF#PBF

Manufacturer Part Number
LTC4271IUF#PBF
Description
Manufacturer
Linear Technology
Datasheet

Specifications of LTC4271IUF#PBF

Operating Temperature (max)
85C
Operating Temperature (min)
-40C
Pin Count
24
Mounting
Surface Mount
Package Type
QFN EP
Case Length
4mm
Screening Level
Industrial
Lead Free Status / Rohs Status
Compliant

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LTC4270/LTC4271
APPLICATIONS INFORMATION
ESD/Cable Discharge Protection
Ethernet ports can be subject to significant ESD events
when long data cables, each potentially charged to thou-
sands of volts, are plugged into the low impedance of the
RJ45 jack. To protect against damage, each port requires a
pair of clamp diodes; one to AGND and one to V
16). An additional surge suppressor is required for each
LTC4270 chip from V
steer harmful surges into the supply rails, where they are
absorbed by the surge suppressor and the V
capacitance. The surge suppressor has the additional
benefit of protecting the LTC4270 from transients on the
V
S1B diodes work well as port clamp diodes, and an
SMAJ58A or equivalent is recommended for the V
suppressor.
28
EE
supply.
EE
to AGND. The diodes at the ports
EE
EE
EE
(Figure
bypass
surge
LAYOUT GUIDELINES
Strict adherence to board layout, parts placement and
routing guidelines is critical for optimal current read-
ing accuracy, IEEE compliance, system robustness, and
thermal dissipation. Refer to the DC1682A Demo Board
as a layout reference. Contact LTC Applications to obtain
a full set of layout guidelines, example layouts and BOMs.
SMAJ58A
–54V
Figure 16. LTC4270 Discharge Protection
0.1μF
A
V
GND
EE
LTC4270
SENSEn
GATEn
OUTn
0.25Ω
0.22μF
42701 F17
S1B
S1B
PORTn
42701f

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