CY8C5365LTI-104 Cypress Semiconductor Corp, CY8C5365LTI-104 Datasheet - Page 32

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CY8C5365LTI-104

Manufacturer Part Number
CY8C5365LTI-104
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY8C5365LTI-104

Lead Free Status / Rohs Status
Compliant
6.4.18 Special Pin Functionality
Some pins on the device include additional special functionality
in addition to their GPIO or SIO functionality. The specific special
function pins are listed in
features are:
7. Digital Subsystem
The digital programmable system creates application specific
combinations of both standard and advanced digital peripherals
and custom logic functions. These peripherals and logic are then
interconnected to each other and to any pin on the device,
providing a high level of design flexibility and IP security.
The features of the digital programmable system are outlined
here to provide an overview of capabilities and architecture.
Designers do not need to interact directly with the programmable
digital system at the hardware and register level. PSoC Creator
provides a high level schematic capture graphical interface to
automatically place and route resources similar to PLDs.
The main components of the digital programmable system are:
Document Number: 001-66237 Rev. *A
Digital
Analog
Universal Digital Blocks (UDB) - These form the core
functionality of the digital programmable system. UDBs are a
collection of uncommitted logic (PLD) and structural logic
(Datapath) optimized to create all common embedded
peripherals and customized functionality that are application or
design specific.
Universal Digital Block Array - UDB blocks are arrayed within
a matrix of programmable interconnect. The UDB array
structure is homogeneous and allows for flexible mapping of
digital functions onto the array. The array supports extensive
and flexible routing interconnects between UDBs and the
Digital System Interconnect.
Digital System Interconnect (DSI) - Digital signals from UDBs,
fixed function peripherals, I/O pins, interrupts, DMA, and other
system core signals are attached to the Digital System
Interconnect to implement full featured device connectivity. The
DSI allows any digital function to any pin or other feature
routability when used with the Universal Digital Block Array.
4 to 25 MHz crystal oscillator
32.768 KHz crystal oscillator
SWD and SWV interface pins
External reset
Opamp inputs and outputs
High current IDAC outputs
External reference inputs
“Pinouts”
on page 5. The special
PRELIMINARY
Figure 7-1. CY8C53 Digital Programmable Architecture
7.1 Example Peripherals
The flexibility of the CY8C53 family’s UDBs and analog blocks
allow the user to create a wide range of components
(peripherals). The most common peripherals were built and
characterized by Cypress and are shown in the PSoC Creator
component catalog, however, users may also create their own
custom components using PSoC Creator. Using PSoC Creator,
users may also create their own components for reuse within
their organization, for example sensor interfaces, proprietary
algorithms, and display interfaces.
The number of components available through PSoC Creator is
too numerous to list in the data sheet, and the list is always
growing. An example of a component available for use in
CY8C53 family, but, not explicitly called out in this data sheet is
the UART component.
PSoC
®
5: CY8C53 Family Datasheet
UDB
UDB
UDB
UDB
UDB
UDB
and Fixed Function Peripherals
and Fixed Function Peripherals
DSI Routing Interface
DSI Routing Interface
Digital Core System
Digital Core System
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
UDB
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