CY8C5367LTI-003 Cypress Semiconductor Corp, CY8C5367LTI-003 Datasheet - Page 3

• Manufacturer Part Number: CY8C5367LTI-003
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY8C5367LTI-003

• Lead Free Status / Rohs Status: Compliant

1. Architectural Overview
Introducing the CY8C53 family of ultra low-power, flash Programmable System-on-Chip (PSoC
PSoC 3 and 32-bit PSoC 5 platform. The CY8C53 family provides configurable blocks of analog, digital, and interconnect circuitry
around a CPU subsystem. The combination of a CPU with a flexible analog subsystem, digital subsystem, routing, and I/O enables
a high level of integration in a wide variety of consumer, industrial, and medical applications.
Figure 1-1
family. They are:
Document Number: 001-66237 Rev. *A
1.8 to 3.6 V
( Optional )
ARM Cortex-M3 CPU subsystem
Nonvolatile subsystem
Programming, debug, and test subsystem
Inputs and outputs
Clocking
Power
Digital subsystem
Analog subsystem
4
32.768 KHz
( Optional )
( Optional )
to
25 MHz
illustrates the major components of the CY8C53
System Wide
Resources
Clocking System
Power Management
Xtal
Osc
IMO
1.8 V LDO
POR and
System
Power
Timer
Wake
Sleep
SMP
WDT
LVD
RTC
ILO
and
Digital Interconnect
EEPROM
PRELIMINARY
8- Bit
Timer
I 2C Slave
Figure 1-1. Simplified Block Diagram
UART
Temperature
LCD Direct
UDB
UDB
UDB
UDB
(TIA, PGA, Mixer etc)
CapSense
Drive
Sensor
Memory System
2 x SC/ CT Blocks
Universal Digital Block Array (24 x UDB)
Quadrature Decoder
8- Bit SPI
UDB
UDB
UDB
UDB
FLASH
SRAM
2x DAC
12- Bit SPI
12- Bit PWM
Logic
UDB
UDB
UDB
UDB
16-Bit
PWM
System Bus
Timer
PSoC’s digital subsystem provides half of its unique
configurability. It connects a digital signal from any peripheral to
any pin through the digital system interconnect (DSI). It also
provides functional flexibility through an array of small, fast,
low-power UDBs. PSoC Creator provides a library of pre-built
and tested standard digital peripherals (UART, SPI, LIN, PRS,
CRC, timer, counter, PWM, AND, OR, and so on) that are
mapped to the UDB array. The designer can also easily create a
digital circuit using boolean primitives by means of graphical
design entry. Each UDB contains programmable array logic
(PAL)/programmable logic device (PLD) functionality, together
with a small state machine engine to support a wide variety of
peripherals.
16- Bit PRS
8- Bit
Analog Interconnect
Digital System
UDB
UDB
UDB
UDB
Logic
PSoC
Cortex M3 CPU
ADC
Controller
Analog System
8051 or
Cache
UDB
UDB
UDB
UDB
CPU System
®
UDB
UDB
UDB
UDB
SAR
ADC
5: CY8C53 Family Datasheet
Controller
Interrupt
PHUB
DMA
Counter
Timer
PWM
4 x
CAN
2.0
®
Opamp
) devices, part of a scalable 8-bit
CMP
Program &
2 x
4 x
Debug
Program
Debug
Trace
+
+
-
-
FS USB
Master/
Slave
I2C
2.0
Page 3 of 106
USB
PHY
Opamp
3 per
22 Ω
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