MAX3107ETG+ Maxim Integrated Products, MAX3107ETG+ Datasheet - Page 43

• Manufacturer Part Number: MAX3107ETG+
• Description: IC UART SPI/I2C 128 FIFO 24TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX3107ETG+

• Features: Internal Oscillators
• Number Of Channels: 4, QUART
• Fifo's: 128 Byte
• Protocol: RS232, RS485
• Voltage - Supply: 2.35 V ~ 3.6 V
• With Auto Flow Control: Yes
• With Irda Encoder/decoder: Yes
• With False Start Bit Detection: Yes
• Mounting Type: Surface Mount
• Package / Case: 24-TQFN Exposed Pad
• Data Rate: 24 Mbps
• Supply Voltage (max): 3.3 V
• Supply Voltage (min): 2.35 V
• Supply Current: 0.64 mA
• Maximum Operating Temperature: + 85 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• No. Of Channels: 1
• Uart Features: 128-Word Transmit / Receive FIFO, Half-Duplex Echo Suppression, Shutdown And Autosleep Modes
• Supply Voltage Range: 2.35V To 3.6V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CLKSource—Clock Source Register
Bit 7: CLKtoRTS
Set the CLKtoRTS bit to 1 to route the baud-rate generator (16x baud rate) output clock to RTS/CLKOUT. The clock
frequency is a factor of 16x, 8x, or 4x of the baud rate, depending on the BRGConfig[5:4] settings.
Bits 6 and 5: No Function
Bit 4: ExtClock
Set the ExtClock bit high to enable an external clocking source (crystal or clock generator at XIN). Set the ExtClock bit
to 0 to select the internal oscillator for clocking.
Bit 3: PLLBypass
Set the PLLBypass bit high to enable bypassing the internal PLL and predivider.
Bit 2: PLLEn
Set the PLLEn bit high to enable the internal PLL. If PLLEn is set low, the internal PLL is disabled.
Bit 1: CrystalEn
Set the CrystalEn bit high to enable the crystal oscillator. When using an external clock source at XIN, CrystalEn must
be set low.
Bit 0: IntOscEn
Set the IntOscEn bit high to enable the internal oscillator. If IntOscEn is set low, the internal oscillator is disabled.
RevID—Revision Identification Register
Bit 7–0: Bit[7:0]
The RevID register indicates the revision number of the MAX3107 silicon, starting with 0xA1. This can be used during
software development.
ADDRESS:
MODE:
ADDRESS:
MODE:
RESET
RESET
NAME
NAME
BIT
BIT
CLKtoRTS
______________________________________________________________________________________
Bit7
7
0
7
1
0x1E
R/W
0x1F
R
Bit6
SPI/I
—
6
0
6
0
2
Bit5
—
5
0
5
1
C UART with 128-Word FIFOs
ExtClock
Bit4
4
0
4
0
and Internal Oscillator
PLLBypass
Bit3
3
1
3
0
PLLEn
Bit2
2
0
2
0
CrystalEn
Bit1
1
0
1
0
IntOscEn
Bit0
0
0
0
1
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