PS21963-AET Mitsumi Electronics, Corp., PS21963-AET Datasheet - Page 3

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PS21963-AET

Manufacturer Part Number
PS21963-AET
Description
Manufacturer
Mitsumi Electronics, Corp.
Datasheet
Fig. 4 BOTH SIDES ZIGZAG TERMINAL TYPE PACKAGE OUTLINES (PS21963-ETW)
Fig. 5 INTERNAL FUNCTIONS BLOCK DIAGRAM (TYPICAL APPLICATION EXAMPLE)
*) Two V
leave another one open.
Note1:
1.778
NC
Z : Surge absorber
C : AC filter (Ceramic capacitor 2.2~6.5nF)
2.54
C1 : Electrolytic type with good temperature and frequency
C2 : 0.22~2µF R-category ceramic capacitor for noise filtering.
0.28
(Note : Additionally, an appropriate line-to line
2:
3:
4:
5:
6:
7:
0.28
surge absorber circuit may become necessary
depending on the application environment).
terminals (9 & 16 pin) are connected inside DIPIPM, please connect either one to the 15V power supply GND outside and
±0.25
(Note : The capacitance value depends on the PWM control
17
AC line input
±0.25
scheme used in the applied system).
18
characteristics
HEAT SINK SIDE
Input logic is high-active. There is a 3.3kΩ (min) pull-down resistor built-in each input circuit. When using an external CR filter, please make it satisfy the
By virtue of integrating an application specific type HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer
This output is open drain type. The signal line should be pulled up to the positive side of the 5V power supply with approximately 10kΩ resistor.
The wiring between the power DC link capacitor and the P, N1 terminals should be as short as possible to protect the DIPIPM against catastrophic high
High voltage (600V or more) and fast recovery type (less than 100ns) diodes should be used in the bootstrap circuit.
It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
Bootstrap negative electrodes should be connected to U, V, W terminals directly and separated from the main output wires.
input threshold voltage.
isolation is possible. (see also Fig. 11)
(see also Fig. 11)
surge voltages. For extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to be mounted close to
these P & N1 DC power input pins.
Z
0.5
QR
Code
C
3 MIN
20×1.778(=35.56)
14×2.54(=35.56)
Type name
Lot No.
38
35
±0.5
±0.3
Inrush current
limiter circuit
0.5
Input signal conditioning
(3V, 5V line)(Note 1, 2) Fault output (5V line)
Low-side input (PWM)
V
0.5
A
NC
7-0.6
25
1
16-0.5
(Note 4)
N1
QR Code is registered trademark of DENSO WAVE INCORPORATED in Japan and other countries.
CIN
P
4-C1.2
N
Drive circuit
Level shifter
Input signal
conditioning
High-side input (PWM)
(3V, 5V line) (Note 1, 2)
circuit (UV)
Protection
Fo logic
(Note 3)
F
O
3
(2.656)
2.5 MIN
(2.756)
Drive circuit
B
Drive circuit
Level shifter
Input signal
conditioning
PS21963-ET/-AET/-CET/-ETW
DETAIL A
Protection
circuit
0.8
Drive circuit
(1.2)
Level shifter
Input signal
conditioning
Under-Voltage
Control supply
3.5
protection
1.5
±0.05
L-side IGBT
H-side IGBT
HEAT SINK SIDE
V
NC
S
S
C1
W
C2
U
(15V line)
(Note 6)
V
TRANSFER-MOLD TYPE
(Note 7)
DETAIL B
TERMINAL CODE
(Note 5)
(Note 6)
V
1.
2.
3.
4.
5.
6.
7.
8.
9.
10. U
11. V
12. W
13. V
14. F
15. CIN
16. V
17. NC
18. NC
19. NC
20. N
21. W
22. V
23. U
24. P
25. NC
AC line output
D
INSULATED TYPE
NC
V
V
V
U
V
W
V
V
DIPIPM
UFB
VFB
WFB
P
P1
NC
N
N1
O
NC
P
N
P
N
*
*
M
Dimensions in mm
Mar. 2009

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