CY62148-55SC Cypress Semiconductor Corporation., CY62148-55SC Datasheet

CY62148-55SC

Manufacturer Part Number

CY62148-55SC

Description

Manufacturer

Cypress Semiconductor Corporation.

Datasheets

1.CY62148-55SC.pdf (7 pages)

2.CY62148-55SC.pdf (9 pages)

3.CY62148-55SC.pdf (7 pages)

Current page: 1 of 7
Download datasheet (190Kb)

Features

Functional Description

The CY62148 is a high-performance CMOS static RAM orga-

nized as 524,288 words by 8 bits. Easy memory expansion is

provided by an active LOW chip enable (CE), an active LOW

output enable (OE), and three-state drivers. This device has

Selection Guide

Cypress Semiconductor Corporation

Maximum Access Time (ns)

Maximum Operating Current

Maximum CMOS Standby Current

Shaded areas contain advance information

• 4.5V 5.5V operation

• CMOS for optimum speed/power

• Low active power

• Low standby power (L version)

• Automatic power-down when deselected

• TTL-compatible inputs and outputs

• Easy memory expansion with CE and OE options

Logic Block Diagram

— 660 mW (max.)

— 2.75 mW (max.)

INPUT BUFFER

512K x 8

DECODER

COLUMN

ARRAY

POWER

DOWN

•

3901 North First Street

PRELIMINARY

62148-1

an automatic power-down feature that reduces power con-

sumption by more than 99% when deselected.

Writing to the device is accomplished by taking chip enable

one (CE) and write enable (WE) inputs LOW. Data on the eight

I/O pins (I/O

specified on the address pins (A

Reading from the device is accomplished by taking chip en-

able one (CE) and output enable (OE) LOW while forcing write

enable (WE). Under these conditions, the contents of the

memory location specified by the address pins will appear on

the I/O pins.

The eight input/output pins (I/O

high-impedance state when the device is deselected (CE

HIGH), the outputs are disabled (OE HIGH), or during a write

operation (CE LOW, and WE LOW).

The CY62148 is available in a standard 450-mil-wide body

width SOIC package.

I/O

Commercial

•

San Jose

through I/O

512K x 8 Static RAM

December 1996 - Revised July 31, 1997

Pin Configuration

•

GND

I/O

CY62148–55

) is then written into the location

CA 95134

120 mA

Top View

0.5 mA

2 mA

SOIC

through I/O

through A

I/O

•

) are placed in a

CY62148

CY62148–70

fax id: 1079

408-943-2600

120 mA

0.5 mA

2 mA

Related parts for CY62148-55SC

Related keywords

CY62148-55SC datasheet
CY62148-55SC data sheet
CY62148-55SC pdf datasheet
CY62148-55SC component
CY62148-55SC part
CY62148-55SC distributor
CY62148-55SC RoHS
CY62148-55SC datasheet download