AT32UC3A3128S Atmel Corporation, AT32UC3A3128S Datasheet - Page 134
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AT32UC3A3128S
Manufacturer Part Number
AT32UC3A3128S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3128S
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
9.6.3.4
32002F–03/2010
Data Trace, Data Read with Sync (DTDRS)
This message is an alternative to the Data Trace, Data Read Message. It is output instead of a
Data Trace, Data Read Message whenever a memory read occurs that matches the debug
logic’s data trace attributes, and when one of the following conditions has occurred:
The processor has exited from reset. This synchronization message is required to allow the
unique portion of the data write address of following Data Trace, Data Read Messages to be cor-
rectly interpreted by the tool.
When enabling data trace is during normal execution of the embedded processor.
Upon exit from a power-down state. This synchronization message is required to allow the
unique portion of the data write address of following Data Trace, Data Read Messages to be cor-
rectly interpreted by the tool.
The Event-In pin has been asserted and a debug control register field specifies that EVTI pin
action is to generate data trace synchronization.
An overrun condition had previously occurred in which one or more data trace occurrences were
discarded by the target processor’s debug logic. To inform the tool that an overrun condition
occurred, the target outputs an Error Message (TCODE = 8) with an ECODE value of 00010 or
00111 immediately prior to the Data Trace, Data Read with Sync Message.
The periodic Data Trace Message counter has expired indicating that 255 without-sync versions
of Data Trace Messages have been sent since the last with-sync version.
A data read is detected following the processor exiting from Debug Mode.
Table 9-46.
Data Trace, Data Read with Sync
message
Packet
Size
8 / 16 /
32
32
2
6
Packet
Name
DATA
F-ADDR
DSZ
TCODE
Data Trace, Data Read with Sync message
Packet
Type
Variable
Variable
Fixed
Fixed
Direction: From target
Description
The data value read. The size will vary depending on the load /
store instruction being traced.
The full address of the memory location written. Most significant
bits that have a value of 0 are truncated.
Data size:
00 = 8 bits
01 = 16 bits
10 = 32 bits
Value=14
AVR32
134