AT32UC3A3128S Atmel Corporation, AT32UC3A3128S Datasheet - Page 75
AT32UC3A3128S
Manufacturer Part Number
AT32UC3A3128S
Description
Manufacturer
Atmel Corporation
Datasheets
1.AT32UC3A0128.pdf
(377 pages)
2.AT32UC3A0128.pdf
(33 pages)
3.AT32UC3A0128.pdf
(159 pages)
4.AT32UC3A3128.pdf
(91 pages)
5.AT32UC3A3128.pdf
(1012 pages)
Specifications of AT32UC3A3128S
Flash (kbytes)
128 Kbytes
Pin Count
144
Max. Operating Frequency
66 MHz
Cpu
32-bit AVR
# Of Touch Channels
32
Hardware Qtouch Acquisition
No
Max I/o Pins
110
Ext Interrupts
110
Usb Transceiver
1
Usb Speed
Hi-Speed
Usb Interface
Device + OTG
Spi
6
Twi (i2c)
2
Uart
4
Lin
4
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
384
Resistive Touch Screen
No
Dac Channels
2
Dac Resolution (bits)
16
Temp. Sensor
No
Crypto Engine
AES
Sram (kbytes)
128
Self Program Memory
YES
External Bus Interface
1
Dram Memory
sdram
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
3.0 to 3.6
Operating Voltage (vcc)
3.0 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
6
Output Compare Channels
18
Input Capture Channels
12
Pwm Channels
12
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
8.5
32002F–03/2010
Multiply instructions
Table 8-1.
These instructions require one pass through the multiplier array and produce a 32- or 48-bit
result. For mulrndhh, a rounding value of 0x8000 is added to the product producing the final
result. This group does not set any flags, except for the mulsat instructions which set Q if satura-
tion occurred.
Table 8-2.
movh
csrf
csrfcz
ssrf
sr{cond4}
Mnemonics
mul
mulhh.w
mulnhh.w
mulnwh.d
mulwh.d
mulsathh.h
mulsathh.w
mulsatwh.w
mulsatrndhh.h
mulsatrndwh.
w
ALU instructions
Multiply instructions
E
C
C
C
C
E
E
E
E
E
E
E
E
E
E
E
Rd, imm
b5
b5
b5
Rd
Operands
Rd, Rx, Ry
Rd, Rs, imm
Rd, Rx<part>,
Ry<part>
Rd, Rx<part>,
Ry<part>
Rd, Rx, Ry<part>
Rd, Rx, Ry<part>
Rd, Rx<part>,
Ry<part>
Rd, Rx<part>,
Ry<part>
Rd, Rx, Ry<part>
Rd, Rx<part>,
Ry<part>
Rd, Rx, Ry<part>
Load immediate into high halfword of register.
CPU revision 2 and higher only.
Clear status register flag.
Set status register flag.
Conditionally set register to true or false
Description
Multiply.
(32 ← 32 x 32)
Signed Multiply of halfwords.
(32 ← 16 x 16)
Signed Multiply of halfwords.
(32 ← 16 x 16)
Signed Multiply, word and halfword.
(48 ← 32 x 16)
Signed Multiply, word and halfword.
(48 ← 32 x 16)
Fractional signed multiply with saturation.
Return halfword.
(16 ← 16 x 16)
Fractional signed multiply with saturation.
Return word.
(32 ← 16 x 16)
Fractional signed multiply with saturation.
Return word.
(32 ← 32 x 16)
Signed multiply with rounding. Return
halfword.
(16 ← 16 x 16)
Signed multiply with rounding. Return
halfword.
(32 ← 32 x 16)
Copy status register flag to C and Z.
Multiply immediate.
AVR32
Issue
latency
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