AT89LS51 Atmel Corporation, AT89LS51 Datasheet - Page 13

no-image

AT89LS51

Manufacturer Part Number
AT89LS51
Description
Manufacturer
Atmel Corporation
Datasheet

Specifications of AT89LS51

Flash (kbytes)
4 Kbytes
Max. Operating Frequency
16 MHz
Cpu
8051-12C
Max I/o Pins
32
Uart
1
Sram (kbytes)
0.125
Operating Voltage (vcc)
2.7 to 4.0
Timers
2
Isp
SPI
Watchdog
Yes

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LS51-16AC
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT89LS51-16AI
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT89LS51-16AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT89LS51-16JC
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT89LS51-16JI
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT89LS51-16JU
Manufacturer:
ATMEL
Quantity:
5 000
Company:
Part Number:
AT89LS51-16JU
Quantity:
5 707
Part Number:
AT89LS51-16PI
Manufacturer:
ATMEL
Quantity:
5 000
Part Number:
AT89LS51-16PU
Manufacturer:
ATMEL
Quantity:
5 000
Part Number:
AT89LS51-24AI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Part Number:
AT89LS512-16JU
Manufacturer:
ATMEL
Quantity:
267
12. Idle Mode
13. Power-down Mode
3053C–MICRO–6/08
Figure 11-2. External Clock Drive Configuration
In idle mode, the CPU puts itself to sleep while all the on-chip peripherals remain active. The
mode is invoked by software. The content of the on-chip RAM and all the special function regis-
ters remain unchanged during this mode. The idle mode can be terminated by any enabled
interrupt or by a hardware reset.
Note that when idle mode is terminated by a hardware reset, the device normally resumes pro-
gram execution from where it left off, up to two machine cycles before the internal reset
algorithm takes control. On-chip hardware inhibits access to internal RAM in this event, but
access to the port pins is not inhibited. To eliminate the possibility of an unexpected write to a
port pin when idle mode is terminated by a reset, the instruction following the one that invokes
idle mode should not write to a port pin or to external memory.
In the Power-down mode, the oscillator is stopped, and the instruction that invokes Power-down
is the last instruction executed. The on-chip RAM and Special Function Registers retain their
values until the Power-down mode is terminated. Exit from Power-down mode can be initiated
either by a hardware reset or by activation of an enabled external interrupt (INT0 or INT1). Reset
redefines the SFRs but does not change the on-chip RAM. The reset should not be activated
before V
the oscillator to restart and stabilize.
Table 13-1.
Mode
Idle
Idle
Power-down
Power-down
CC
is restored to its normal operating level and must be held active long enough to allow
Status of External Pins During Idle and Power-down Modes
Program Memory
Internal
External
Internal
External
OSCILLATOR
EXTERNAL
SIGNAL
NC
ALE
1
1
0
0
PSEN
1
1
0
0
XTAL2
XTAL1
GND
PORT0
Float
Float
Data
Data
PORT1
Data
Data
Data
Data
AT89LS51
Address
PORT2
Data
Data
Data
PORT3
Data
Data
Data
Data
13

Related parts for AT89LS51