AT89LS51 Atmel Corporation, AT89LS51 Datasheet - Page 8
AT89LS51
Manufacturer Part Number
AT89LS51
Description
Manufacturer
Atmel Corporation
Datasheet
1.AT89LS51.pdf
(31 pages)
Specifications of AT89LS51
Flash (kbytes)
4 Kbytes
Max. Operating Frequency
16 MHz
Cpu
8051-12C
Max I/o Pins
32
Uart
1
Sram (kbytes)
0.125
Operating Voltage (vcc)
2.7 to 4.0
Timers
2
Isp
SPI
Watchdog
Yes
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8
AT89LS51
Table 5-2.
Dual Data Pointer Registers: To facilitate accessing both internal and external data memory,
two banks of 16-bit Data Pointer Registers are provided: DP0 at SFR address locations 82H-
83H and DP1 at 84H-85H. Bit DPS = 0 in SFR AUXR1 selects DP0 and DPS = 1 selects DP1.
The user should always initialize the DPS bit to the appropriate value before accessing the
respective Data Pointer Register.
Power Off Flag: The Power Off Flag (POF) is located at bit 4 (PCON.4) in the PCON SFR. POF
is set to “1” during power up. It can be set and rest under software control and is not affected by
reset.
AUXR
Addressable
Bit
–
DISALE
DISRTO
WDIDLE
WDIDLE
0
1
Not Bit
Reserved for future expansion
Disable/Enable ALE
DISALE
Operating Mode
0
1
Disable/Enable Reset out
DISRTO
0
1
Disable/Enable WDT in IDLE mode
AUXR: Auxiliary Register
WDT continues to count in IDLE mode
WDT halts counting in IDLE mode
–
7
Address = 8EH
ALE is emitted at a constant rate of 1/6 the oscillator frequency
ALE is active only during a MOVX or MOVC instruction
Reset pin is driven High after WDT times out
Reset pin is input only
–
6
–
5
WDIDLE
4
DISRTO
3
–
2
Reset Value = XXX00XX0B
–
1
DISALE
3053C–MICRO–6/08
0