SAM7XC256 Atmel Corporation, SAM7XC256 Datasheet - Page 15

• Manufacturer Part Number: SAM7XC256
• Manufacturer: Atmel Corporation

Specifications of SAM7XC256

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 62
• Ext Interrupts: 62
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 3
• Can: 1
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Dac Resolution (bits): No
• Temp. Sensor: No
• Crypto Engine: AES/DES
• Sram (kbytes): 64
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

ARM DDI 0029G
Figure 7-23
Figure B-1
Figure B-2
Figure B-3
Figure B-4
Figure B-5
Figure B-6
Figure B-7
Figure B-8
Figure B-9
Figure B-10
Figure B-11
APE control timing ................................................................................................... 7-27
ARM7TDMI core scan chain arrangements .............................................................. B-4
Test access port controller state transitions .............................................................. B-5
ID code register format ............................................................................................ B-14
Input scan cell ......................................................................................................... B-17
Clock switching on entry to debug state .................................................................. B-22
Debug exit sequence .............................................................................................. B-28
EmbeddedICE block diagram ................................................................................. B-41
Watchpoint control value and mask format ............................................................. B-42
Debug control register format .................................................................................. B-48
Debug status register format ................................................................................... B-50
Debug control and status register structure ............................................................ B-51
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