SAM9G15 Atmel Corporation, SAM9G15 Datasheet - Page 14

• Manufacturer Part Number: SAM9G15
• Manufacturer: Atmel Corporation

Specifications of SAM9G15

• Flash (kbytes): 0 Kbytes
• Pin Count: 217
• Max. Operating Frequency: 400 MHz
• Cpu: ARM926
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 105
• Ext Interrupts: 105
• Usb Transceiver: 3
• Usb Speed: Hi-Speed
• Usb Interface: Host, Device
• Spi: 2
• Twi (i2c): 3
• Uart: 6
• Lin: 4
• Ssc: 1
• Sd / Emmc: 2
• Graphic Lcd: Yes
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 12
• Adc Resolution (bits): 10
• Adc Speed (ksps): 440
• Resistive Touch Screen: Yes
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 32
• Self Program Memory: NO
• External Bus Interface: 1
• Dram Memory: DDR2/LPDDR, SDRAM/LPSDR
• Nand Interface: Yes
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8/3.3
• Operating Voltage (vcc): 0.9 to 1.1
• Fpu: No
• Mpu / Mmu: No/Yes
• Timers: 6
• Output Compare Channels: 6
• Input Capture Channels: 6
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

Table 4-3.
14
Ball
D14
D15
A16
B16
A17
B15
C14
B14
A15
C15
D12
C13
A14
B13
A13
C12
H16
H15
H17
G17
G16
E17
G15
G14
D17
C17
E16
D16
C16
B17
E15
E14
T17
T16
J15
F17
F16
F15
B9
B8
D9
C9
C7
Power Rail
VDDUTMIC
GNDUTMI
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
SAM9G15
Pin Description BGA217 (Continued)
I/O Type
POWER
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
EBI_O
GND
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
VDDUTMIC
GNDUTMI
Signal
NWR0
NWR1
NCS0
NCS1
NRD
D10
D11
D12
D13
D14
D15
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
Primary
Dir
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
NBS2/DQM/
Signal
NWRE
NWR2
SDCS
NBS0
NBS1
BA0
BA1
BA2
Alternate
Dir
O
O
O
O
O
O
O
O
PIO Peripheral A
Signal
Dir
PIO Peripheral B
Signal
Dir
PIO Peripheral C
Signal
11052AS–ATARM–27-Jul-11
Dir
Signal, Dir, PU,
Reset State
PD, ST
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PD
O, PU
O, PU
O, PU
O, PU
O, PU
I
I