SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 481

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

Figure 28-21. Programmer Sends Data While the Bus is Busy
Figure 28-22. Arbitration Cases
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Data from a Master
TWI DATA transfer
TWI DATA transfer
Data from TWI
(DADR + W + START + Write THR)
(DADR + W + START + Write THR)
ARBLST
TWCK
A transfer is programmed
TWCK
TWD
TWD
A transfer is programmed
TWCK
TWD
Note:
The flowchart shown in
in Multi-master mode.
S
S
S
In the case where the arbitration is lost and TWI is addressed, TWI will not acknowledge even if it
is programmed in Slave mode as soon as ARBLST is set to 1. Then, the Master must repeat
SADR.
DATA sent by a master
1
1
1
Transfer is stopped
Bus is busy
0 0
0
0 0
1
STOP sent by the master
Transfer is kept
1 1
1 1
TWI stops sending data
Arbitration is lost
Figure 28-23 on page 482
(DADR + W + START + Write THR)
Transfer is programmed again
Data from the master
Bus is busy
Transfer is kept
Bus is free
Bus is considered as free
Transfer is initiated
P
P
Bus is free
gives an example of read and write operations
Bus is considered as free
Transfer is initiated
START sent by the TWI
S
S
S
1
1
1
0
0 0
0
DATA sent by the TWI
1
0
1 1
The master stops sending data
1 1
Arbitration is lost
Data from the TWI
SAM3N
SAM3N
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