SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 665

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

33.7.5
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• CHx: Channel x Enable
0 = No effect.
1 = Enables the corresponding channel.
Note: if USEQ = 1 in ADC_MR register, CHx corresponds to the xth channel of the sequence described in ADC_SEQR1
and ADC_SEQR2.
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
CH15
CH7
31
23
15
–
–
7
ADC Channel Enable Register
CH14
CH6
30
22
14
ADC_CHER
0x40038010
Write-only
–
–
6
CH13
CH5
29
21
13
–
–
5
CH12
CH4
28
20
12
–
–
4
“ADC Write Protect Mode Register” on page
CH11
CH3
27
19
11
–
–
3
CH10
CH2
26
18
10
–
–
2
CH9
CH1
25
17
–
–
9
1
677.
SAM3N
SAM3N
CH8
CH0
24
16
–
–
8
0
665
665