SAM3S8C Atmel Corporation, SAM3S8C Datasheet - Page 573
SAM3S8C
Manufacturer Part Number
SAM3S8C
Description
Manufacturer
Atmel Corporation
- Current page: 573 of 1143
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28.8.1
11090A–ATARM–10-Feb-12
11090A–ATARM–10-Feb-12
Write Protection Registers
To prevent any single software error that may corrupt SSC behavior, certain address spaces can
be write-protected by setting the WPEN bit in the
(SSC_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the SSC Write Pro-
tect Status Register (US_WPSR) is set and the field WPVSRC indicates in which register the
write access has been attempted.
The WPVS flag is reset by writing the SSC Write Protect Mode Register (SSC_WPMR) with the
appropriate access key, WPKEY.
The protected registers are:
•
•
•
•
•
•
•
“SSC Clock Mode Register” on page 576
“SSC Receive Clock Mode Register” on page 577
“SSC Receive Frame Mode Register” on page 579
“SSC Transmit Clock Mode Register” on page 581
“SSC Transmit Frame Mode Register” on page 583
“SSC Receive Compare 0 Register” on page 589
“SSC Receive Compare 1 Register” on page 590
“SSC Write Protect Mode Register”
SAM3S8/SD8
SAM3S8/SD8
573
573
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