AD7707 Analog Devices, AD7707 Datasheet - Page 18

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AD7707

Manufacturer Part Number
AD7707
Description
Manufacturer
Analog Devices
Datasheet

Specifications of AD7707

Resolution (bits)
16bit
# Chan
3
Sample Rate
n/a
Interface
Ser,SPI
Analog Input Type
Diff-Uni,SE-Bip
Ain Range
Bip (Vref)/(PGA Gain),Bip 10V,Bip 5.0V,Uni (Vref)/(PGA Gain),Uni 10V,Uni 5.0V
Adc Architecture
Sigma-Delta
Pkg Type
SOIC,SOP

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AD7707
ON-CHIP REGISTERS
The AD7707 contains eight on-chip registers that can be
accessed via the serial port of the part. The first of these is a
communications register that controls the channel selection,
decides whether the next operation is a read or write operation
and selects which register the next read or write operation
accesses. All communications to the part must start with a write
operation to the communications register. After power-on or
RESET , the device expects a write to its communications register.
The data written to this register determines whether the next
operation to the part is a read or a write operation and
determines to which register this read or write operation occurs.
Therefore, write access to any of the other registers on the part
starts with a write operation to the communications register
followed by a write to the selected register. A read operation
from any other register on the part (including the communications
register itself and the data register) starts with a write operation
to the communications register followed by a read operation
from the selected register. The communications register also
controls the standby mode and channel selection and the DRDY
status is available by reading from the communications register.
The second register is a setup register that determines calibration
mode, gain setting, bipolar/unipolar operation, and buffered
mode. The third register is the clock register and contains the
filter selection bits and clock control bits. The fourth register is
Table 14. Communications Register
0/DRDY (0)
Table 15. Communications Register Bit Descriptions
Bit
0/DRDY
RS2 to
RS0
R/W
STBY
CH1,
CH0
Description
For a write operation, a 0 must be written to this bit so that the write operation to the communications register actually takes place. If a
1 is written to this bit, the part does not clock on to subsequent bits in the register. The serial interface stays at this bit location
until a 0 is written to this bit. Once a 0 is written to this bit, the next seven bits are loaded to the communications register. For a read
operation, this bit provides the status of the DRDY flag from the part. The status of this bit is the same as the DRDY output pin.
Read/Write select. This bit selects whether the next operation is a read or write operation to the selected register. A 0 indicates a
Register selection bits. These three bits select to which one of eight on-chip registers the next read or write operation takes
place, as shown in Table 16, along with the register size. When the read or write operation to the selected register is complete,
the part waits for a write operation to the communications register. It does not remain in a state where it continues to access the
register.
write cycle for the next operation to the appropriate register, while a 1 indicates a read operation from the appropriate register.
Standby. Writing a 1 to this bit puts the part into its standby or power-down mode. In this mode, the part consumes only
8 μA of power supply current. The part retains its calibration coefficients and control word information when in standby. Writing
a 0 to this bit places the part in its normal operating mode. The serial interface on the AD7707 remains operational when the
part is in standby mode.
Channel select. These two bits select a channel for conversion or for access to the calibration coefficients as outlined in Table 17.
Three pairs of calibration registers on the part are used to store the calibration coefficients following a calibration on a channel. They are
shown in Table 17 for the AD7707 to indicate which channel combinations have independent calibration coefficients. With CH1
at Logic 1 and CH0 at a Logic 0, the part looks at the LOCOM input internally shorted to itself. This can be used as a test method
to evaluate the noise performance of the part with no external noise sources. In this mode, the LOCOM input should be
connected to an external voltage within the allowable common-mode range for the part.
RS2 (0)
RS1 (0)
RS0 (0)
Rev. B | Page 18 of 52
R/W (0)
the data register from which the output data from the part is
accessed. The final registers are the calibration registers, which
store channel calibration data. The registers are described in
more detail in the following sections.
COMMUNICATIONS REGISTER (RS2, RS1, RS0 = 0,
0, 0)
The communications register is an 8-bit register from which
data can either be read or to which data can be written. All
communications to the part must start with a write operation to
the communications register. The data written to the commu-
nications register determines whether the next operation is a
read or write operation and to which register this operation
takes place. When the subsequent read or write operation to the
selected register is complete, the interface returns to where it
expects a write operation to the communications register. This
is the default state of the interface, and on power-up or after a
RESET , the AD7707 is in this default state waiting for a write
operation to the communications register. In situations where
the interface sequence is lost, if a write operation of sufficient
duration (containing at least 32 serial clock cycles) takes place
with DIN high, the AD7707 returns to this default state.
outlines the bit designations for the communications register.
STBY (0)
CH1 (0)
CH0 (0)
Table 14

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