AD7714 Analog Devices, AD7714 Datasheet

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... The part features three differential analog inputs (which can also be configured as five pseudo-differential analog inputs) as well as a differential reference input. It operates from a single supply (+ V). The AD7714 thus performs all signal conditioning and conversion for a system consisting five channels. The AD7714 is ideal for use in smart, microcontroller- or DSP- based systems. It features a serial interface that can be configured † ...

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... AD7714-5–SPECIFICATIONS f = 2.4576 MHz unless otherwise noted. All specifications T CLK IN Parameter STATIC PERFORMANCE No Missing Codes Output Noise Integral Nonlinearity Unipolar Offset Error 3 Unipolar Offset Drift Bipolar Zero Error 3 Bipolar Zero Drift 4 Positive Full-Scale Error 3, 5 Full-Scale Drift 6 Gain Error 3, 7 Gain Drift ...

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... A max 0.4 V max 2.0 V min 0.4 V max 2.5 V min 0.4 V max I SINK DV – 0.6 V min I DD SOURCE 10 A max 9 pF typ Binary Unipolar Mode Offset Binary Bipolar Mode –3– AD7714 60 Hz REF 12 = 100 A Except for MCLK OUT 12 = 100 A Except for MCLK OUT f NOTCH f NOTCH f NOTCH f NOTCH ...

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... AD7714–SPECIFICATIONS (AD7714-5); REF IN(–) = AGND; MCLK MHz to 2.4576 MHz unless otherwise noted. All specifications T Parameter A Versions 14 TRANSDUCER BURNOUT Current 1 Initial Tolerance Drift 0.1 SYSTEM CALIBRATION 15 Positive Full-Scale Calibration Limit (1.05 15 Negative Full-Scale Calibration Limit –(1.05 16 Offset Calibration Limit –(1.05 16 Input Span ...

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... NOMINAL NOMINAL NOMINAL NOMINAL DD = 800 A with Except for MCLK OUT DD = 100 A with Except for MCLK OUT DD = 200 A with Except for MCLK OUT DD AD7714 = NOTCH f NOTCH f NOTCH f NOTCH ...

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... AD7714Y Parameter LOGIC OUTPUTS (Continued Output High Voltage OH Floating State Leakage Current 13 Floating State Output Capacitance D ata Output Coding 14 TRANSDUCER BURNOUT Current Initial Tolerance Drift SYSTEM CALIBRATION 15 Positive Full-Scale Calibration Limit 15 Negative Full-Scale Calibration Limit 16 Offset Calibration Limit 16 Input Span POWER REQUIREMENTS ...

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... See Figures 6 and 7. Timing applies for all grades. 3 CLKIN Duty Cycle range is 45% to 55%. CLKIN must be supplied whenever the AD7714 is not in standby mode clock is present in this case, the device can draw higher current than specified and possibly become uncalibrated. 4 The AD7714 is production tested with ...

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... Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PIN CONFIGURATIONS SSOP SCLK MCLK IN DGND DV MCLK OUT DD DIN POL SYNC DOUT DRDY RESET AD7714 CS NC TOP VIEW AGND NC (Not to Scale) AIN6 AIN1 AIN5 AIN2 REF IN(+) AIN3 REF IN(–) AIN4 STANDBY ...

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... Serial Clock. Logic Input. An external serial clock is applied to this input to access serial data from the AD7714. This serial clock can be a continuous clock with all data transmitted in a continuous train of pulses. Alternatively, it can be a noncontinuous clock with the information being transmitted to the AD7714 in smaller batches of data ...

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... DRDY 20 Logic output. A logic low on this output indicates that a new output word is available from the AD7714 data register. The DRDY pin will return high upon completion of a read operation of a full output word data read has taken place, after an output update, the DRDY line will return high for 500 t the next output update ...

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... AD7714-5 OUTPUT NOISE Table Ia shows the output rms noise and effective resolution for some typical notch and –3 dB frequencies for the AD7714-5 with f = 2.4576 MHz while Table Ib gives the information for f CLK IN with +2.5 V and with BUFFER = 0. These numbers are typical and are generated at an analog input voltage The REF numbers in brackets in each table are for the effective resolution of the part (rounded to the nearest 0 ...

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... AD7714 AD7714-3 OUTPUT NOISE Table IIa shows the output rms noise and effective resolution for some typical notch and –3 dB frequencies for the AD7714-3 with f = 2.4576 MHz while Table IIb gives the information for f CLK IN ranges with +1.25 V and BUFFER = 0. These numbers are typical and are generated at an analog input voltage ...

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... BUFFERED MODE NOISE Table III shows the typical output rms noise and effective resolution for some typical notch and –3 dB frequencies for the AD7714- 5 with f = 2.4576 MHz and BUFFER = +5 V. Table IV gives the information for the AD7714-3 again with f CLK IN MHz and BUFFER = +5 V. The numbers given are for the bipolar input ranges and are generated with a differential analog input voltage ...

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... ON-CHIP REGISTERS The AD7714 contains eight on-chip registers which can be accessed via the serial port of the part. The first of these is a Communica- tions Register which controls the channel selection, decides whether the next operation is a read or write operation and also decides which register the next read or write operation accesses ...

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... In pseudo-differential mode, the AD7714 has five input channels with some of the input channel combinations sharing calibration registers. With CH2, CH1 and CH0 at a logic 1, the part looks at the AIN6 input internally shorted to itself. This can be used as a test method to evaluate the noise performance of the part with no external noise sources ...

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... Background Calibration; this activates background calibration on the channel selected by CH2, CH1 and CH0 of the Communications Register. If the background calibration mode is on, then the AD7714 provides continuous self-calibration of the shorted (zeroed) inputs. This calibration takes place as part of the conversion sequence, extending the conversion time and reducing the word rate by a factor of six. ...

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... Filter Registers. Power On/Reset Status: Filter High Register: 01 Hex. Filter Low Register: 40 Hex. There are two 8-bit Filter Registers on the AD7714 from which data can either be read or to which data can be written. Tables IX and X outline the bit designations for the Filter Registers. ...

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... Data Register (RS2–RS0 = The Data Register on the part is a read-only register which contains the most up-to-date conversion result from the AD7714. The register can be programmed to be either 16-bits or 24-bits wide, determined by the status of the WL bit of the Mode Register. If the Communications Register data sets up the part for a write operation to this register, a write operation must actually take place in order to return the part to where it is expecting a write operation to the Communications Register (the default state of the interface) ...

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... The part consumes only 500 A of power supply current and features a standby mode which requires only 10 A, making it ideal for battery-powered or loop-powered instru- ments. The part comes in two versions, the AD7714-5, which is specified for operation from a nominal +5 V analog supply (AV ...

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... AD7714 ANALOG INPUT Analog Input Ranges The AD7714 contains six analog input pins (labelled AIN1 to AIN6) which can be configured as either three fully differential input channels or five pseudo-differential input channels. Bits CH0, CH1 and CH2 of the Communications Register configure the analog input arrangement and the channel selection is as outlined previously in Table VII ...

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... For example, if AIN(–) is +2.5 V and the AD7714 is configured for unipolar operation with a gain of 2 and a V +2.5 V, the input voltage range on the AIN(+) input is +2 +3. AIN(–) is +2.5 V and the AD7714 is configured for bipolar mode with a gain of 2 and a V REF input range on the AIN(+) input is +1 ...

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... For example, if the required bandwidth is 7.86 Hz but the required update rate is 100 Hz, the data can be taken from the AD7714 at the 100 Hz rate giving a –3 dB bandwidth of 26.2 Hz. Post-filtering can be applied to this to reduce the bandwidth and output noise, to the 7.86 Hz bandwidth level, while maintaining an output rate of 100 Hz. ...

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... AD7714 in order to eliminate unwanted frequencies from these bands which the digital filter will pass. It may also be necessary in some applications to pro- vide analog filtering in front of the AD7714 to ensure that dif- ferential noise signals outside the band of interest do not saturate the analog modulator. ...

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... A full-scale calibration should not be carried out unless the part contains valid zero-scale coefficients. These calibrations are initiated on the AD7714 by writing the appropriate values ( for ZS Self-Calibration and for FS Self Calibra- tion) to the MD2, MD1 and MD0 bits of the Mode Register. ...

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... AD7714 by a factor of six. Its advantage is that the part is continually performing offset calibrations and automatically updating its zero-scale calibration coefficients result, the effects of temperature drift, supply sensitivity and time drift on zero-scale errors are automatically removed ...

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... DD crystal which appears between the MCLK IN and MCLK OUT pins of the AD7714 general rule, the lower the ESR value then the lower the current taken by the oscillator circuit. When operating with a clock frequency of 2.4576 MHz, there is ...

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... DD DD latch-up performance of the AD7714 is good important that power is applied to the AD7714 before signals at REF IN, AIN or the logic input pins in order to avoid latch-up. If this is not possible, then the current which flows in any of these pins should be limited. If separate supplies are used for the AD7714 and the system digital circuitry, then the AD7714 should be powered up first ...

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... The analog ground plane should be allowed to run under the AD7714 to avoid noise coupling. The power supply lines to the AD7714 should use as large a trace as pos- sible to provide low impedance paths and reduce the effects of glitches on the power supply line. Fast switching signals like ...

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... The serial interface can be reset by exercising the RESET input on the part. It can also be reset by writing a series the DIN input logic 1 is written to the AD7714 DIN line for at least 32 serial clock cycles the serial interface is reset. This ensures in three-wire systems that if the interface gets lost, either via a software error or by some glitch in the system, it can be reset back into a known state ...

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... SAME CHANNEL & SETTING UP NEXT OPERATION READ FROM THE DATA REGISTER (5F HEX) READ FROM DATA REGISTER Figure 8. Flowchart for Setting Up and Reading from the AD7714 the data register has taken place, the second where the DRDY bit of the Communications Register is interrogated to see if a data register update has taken place ...

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... Therefore, the POL input of the AD7714 should be hard-wired low. For systems where it is preferable that the SCLK idle high, the CPOL bit of the 68HC11 should be set to a logic 1 and the POL input of the AD7714 should be hard-wired to a logic high. DV ...

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... ADSP-2105 is a continuous clock, the CS of the AD7714 must be used to gate off the clock once the transfer is complete. The CS for the AD7714 is active when either the RFS or TFS outputs from the ADSP-2103/ADSP-2105 are active. The serial clock rate on the ADSP-2103/ADSP-2105 should be limited to 3 MHz to ensure correct operation with the AD7714 ...

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... This program has read and write routines for the 68HC11 to interface to the AD7714 and the sample program sets the various registers and then reads 1000 samples from the part. */ #include <math.h> #include <io6811.h> #define NUM_SAMPLES 1000 /* change the number of data samples */ #define MAX_REG_LENGTH 3 /* this says that the max length of a register is 3 bytes */ Writetoreg (int) ...

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... V reference voltage for the AD7714 when the excitation voltage Using the part with a programmed gain of 128 results in the full scale input span of the AD7714 being 15 mV which corresponds with the output span from the transducer. +5V ...

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... Temperature Measurement Another application area for the AD7714 is in temperature measurement. Figure 13 outlines a connection from a thermo- couple to the AD7714. In this application, the AD7714 is oper- ated in its buffered mode to allow large decoupling capacitors on the front end to eliminate any noise pickup which there may ...

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... If the buffer is required, the common-mode voltage should be set accordingly by inserting a small resistance between the bot- tom end of the RTD and AGND of the AD7714. In the appli- cation shown an external 400 A current source provides the excitation current for the PT100 and it also generates the refer- ence voltage for the AD7714 via the 6 ...

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... Figure 15. Data Acquisition System Using the AD7714 REV. C from a single + supply provided that the input sig- nals to the AD7714’s analog inputs are all of positive polarity. The low power operation of the AD7714 ensures that very little power has to be brought across the isolation barrier. Figure 15 shows the AD7714 in an isolated data acquisition system ...

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... OUT AGND DGND ISOLATED GROUND The AD7714 consumes only 500 A, leaving 3 mA available for the rest of the transmitter. Figure 16 shows a block diagram of a smart transmitter which includes the AD7714. Not shown in Figure 16 is the isolated power source required to power the front end. ...

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... Post-Filtering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 ANALOG FILTERING . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 CALIBRATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Self-Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 System Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 System-Offset Calibration . . . . . . . . . . . . . . . . . . . . . . . . 25 Background Calibration . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Span and Offset Limits . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Power-Up and Calibration . . . . . . . . . . . . . . . . . . . . . . . . 26 USING THE AD7714 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Clocking and Oscillator Circuit . . . . . . . . . . . . . . . . . . . . 26 System Synchronization . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Reset Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Accuracy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 Drift Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 POWER SUPPLIES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Supply Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Grounding and Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 Evaluating the AD7714 Performance ...

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... AD7714 24-Lead Plastic DIP (N-24) 1.228 (31.19) 1.226 (31.14 0.260 ± 0.001 (6.61 ± 0.03 PIN 1 0.130 (3.30) 0.128 (7.62) 0.02 (0.5) 0.11 (2.79) 0.07 (1.78) SEATING PLANE 0.019 (0.41) 0.016 (2.28) 0.05 (1.27) NOTES: 1. LEAD NO. 1 IDENTIFIED BY DOT OR NOTCH 2. PLASTIC LEADS WILL BE EITHER SOLDER DIPPED OR TIN PLATED IN ACCORDANCE WITH MIL-M-38510 REQUIREMENTS. 24-Lead Wide Body SOIC (R-24) 0 ...