ADA4817-1 Analog Devices, ADA4817-1 Datasheet - Page 16

• Manufacturer Part Number: ADA4817-1
• Description: Low Noise, 1 GHz FastFET Op Amps
• Manufacturer: Analog Devices

Specifications of ADA4817-1

• -3db Bandwidth: 1.05GHz
• Slew Rate: 870V/µs
• Vos: 400µV
• Ib: 2pA
• # Opamps Per Pkg: 1
• Input Noise (nv/rthz): 4nV/rtHz
• Vcc-vee: 5V to 10V
• Isy Per Amplifier: 21mA
• Packages: CSP,SOIC

ADA4817-1/ADA4817-2
Table 8. Power-Down Voltage Control
PD Pin
Not active
Active
CAPACITIVE FEEDBACK
Due to package variations and pin-to-pin parasitics between the
single and the dual models, the ADA4817-2 has a little more
peaking then the ADA4817-1, especially at a gain of 2. The best
way to tame the peaking is to place a feedback capacitor across
the feedback resistor. Figure 46 shows the small signal frequency
response of the ADA4817-2 at a gain of 2 vs. C
was used to show the peaking, but then two other values of
0.5 pF and 1 pF were used to show how to reduce the peaking or
even eliminate it. As shown in Figure 46, if the power consumption
is a factor in the system, then using a larger feedback capacitor
is acceptable as long as a feedback capacitor is used across it to
control the peaking. However, if power consumption is not an
issue, then a lower value feedback resistor, such as 200 Ω, would
not require any additional feedback capacitance to maintain
flatness and lower peaking.
HIGHER FREQUENCY ATTENUATION
There is another package variation problem between the SOIC
and the LFCSP package. The SOIC package shows approximately
1 dB to 1.5 dB of additional peaking at a gain of 1. This is due to
the parasitic in the SOIC package, which is not recommended
for very high frequency parts that exceed 1 GHz. A good approach
to reducing the peaking is to place a resistor, R
the noninverting input. This creates a first-order pole formed
by R
Figure 46. Small Signal Frequency Response vs. Feedback Capacitor
S
and C
–3
–6
–9
9
6
3
0
1M
R
G = 2
V
V
R
IN
F
S
OUT
L
, the common-mode input capacitance.
= 348Ω
= 10V
= 100Ω
= 100mV p-p
10M
±5 V
>4 V
<2 V
C
(ADA4817-2)
F
FREQUENCY (Hz)
= 0.5pF
C
F
= 1pF
100M
+3 V, −2 V
>2 V
<0 V
NO C
1G
F
S
F
, in series with
. At first, no C
10G
Rev. A | Page 16 of 28
F
Figure 47 shows the higher frequency attenuation, which
reduces the peaking but also reduces the −3 dB bandwidth.
As shown in Figure 47, the peaking dropped by almost 2 dB
when R
dropped from 1 GHz to 700 MHz. To maintain the −3 dB
bandwidth and to reduce peaking, an RLC circuit is recommended
instead of R
The R in parallel to the series LC forms a notch that can be
shaped to compensate for the peaking produced by the amplifier.
The result is a smooth 1 GHz −3 dB bandwidth, 250 MHz 0.1 dB
flatness, and less than 1 dB of peaking. This circuit should be
placed in the path of the noninverting input when the ADA4817-x
is used at a gain of 1. The RLC values may need tweaking
depending on the source impedance and the flatness and band-
width required. Figure 49 shows the frequency response after the
RLC circuit is in place.
Figure 47. Small Signal Frequency Response for Various R
–3
–6
–9
–3
–6
–9
S
6
3
0
6
3
0
= 0 Ω to R
1M
1M
R
V
V
G = 1
R
V
V
G = 1
S
S
OUT
L
L
S
OUT
, as shown in Figure 48.
Figure 49. Frequency Response with RLC Circuit
= 100Ω
= ±5V
= 100Ω
= 10V
= 0.1V p-p
= 100mV p-p
S
= 100 Ω, and in return, the −3 dB bandwidth
10M
10M
Figure 48. RLC Circuit
10nH
FREQUENCY (Hz)
FREQUENCY (Hz)
L
120Ω
R
100M
100M
R
S
2pF
C
= 100Ω
RLC
1G
1G
NO RLC
R
S
R
S
= 75Ω
R
= 50Ω
S
= 0Ω
S
(SOIC)
10G
10G