E-TDA7590TR STMicroelectronics, E-TDA7590TR Datasheet - Page 19

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E-TDA7590TR

Manufacturer Part Number
E-TDA7590TR
Description
IC DSP SPEECH/AUDIO 144-TQFP
Manufacturer
STMicroelectronics
Type
Signalr
Datasheet

Specifications of E-TDA7590TR

Applications
Speech Recognition
Mounting Type
Surface Mount
Package / Case
144-TQFP Exposed Pad, 144-eTQFP, 144-HTQFP, 144-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
E-TDA7590TR
Manufacturer:
STMicroelectronics
Quantity:
10 000
TDA7590
7
7.1
7.2
7.3
7.4
DSP peripherals
Serial audio interface (SAI)
The SAI is used to communicate between the CODEC and the DSPs.
In addition, digital audio can be directly input for processing. There is only one SAI found on
the chip that can be accessed by either the DSP or the DMA controller. The main features of
this block are listed below:
Serial communication interface (SCI)
The serial communication interface provides a full duplex port for serial communication to
other DSPs, microprocessors, and peripherals like modems.
The interface supports the following features:
I
The inter integrated-circuit bus is a simple bi-directional two-wire bus used for efficient inter
IC control. All I
them to communicate directly with each other via the I
Every component connected to the I
memory or some other complex function chip. Each of these chips can act as a receiver
and/or transmitter depending on it s functionality.
Host interface (HI)
The host interface is a system-on-chip module that permits connection to the data bus of a
host processor. The HI is capable of driving 16 programmable external pins which can be
configured as an 8 bit parallel port for direct connection to a host processor.
2
C interface
Slave operating modes, all clock lines can be inputs or outputs
Transmit and receive interrupt logic triggers on left/right data pairs
Receive and transmit data registers have two locations to hold left and right data
No additional logic for connection to other TTL level peripherals
Asynchronous bit rates and protocols "High speed“ synchronous data
transmission.
Asynchronous protocol includes Multidrop mode for master/slave operation with
wake-up on Idle line and wake-up on address bit capability, permitting the SCI to
share a single line with multiple peripherals
Transmit and receive logic can operate asynchronously from each other.
A programmable baud-rate generator which provide the transmit and receive
clocks or functions as a general purpose timer.
2
C bus compatible devices incorporate an on-chip interface which allows
2
C bus has it s own unique address whether it is a CPU,
2
C bus.
DSP peripherals
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