TDA7429L STMicroelectronics, TDA7429L Datasheet
TDA7429L
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TDA7429L Summary of contents
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... IN 1dB STEPS FOR BALANCE FACILITY - INDEPENDENT MUTE FUNCTION SUBWOOFER OUTPUT (L+R) CONTROLLED IN 1dB STEP INPUTS ALL FUNCTIONS PROGRAMMABLE VIA SERIAL BUS 2 DESCRIPTION The TDA7429L is volume tone (bass middle and tre- ble) balance (Left/Right) processors for quality audio Figure 2. Test Circuit BASSO_R L+R OUTPUT 9 N. ...
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... TDA7429L Table 2. Absolute Maximum Ratings Symbol V Operating Supply Voltage S T Operating Ambient Temperature amb T Storage Temperature Range stg Figure 3. Pin Description MONO INPUT Table 3. Quick Reference Data Symbol V Supply Voltage S V Max Input Signal Handling CL THD Total Harmonic Distortion V = 0.1Vrms f = 1KHz ...
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... Figure 4. Block Diagram MIDDLE_LO MIDDLE_LI TDA7429L BASS_RO BASS_RI MIDDLE_RO MIDDLE_RI REARIN CREF AGND 3/17 ...
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... TDA7429L Table 5. Electrical Characteristcs (refer to the test circuit 600 , all controls flat (G = 0dB), L+R CTRL = +4dB, MODE = OFF 1KHz unless otherwise specified). Symbol Parameter SUPPLY V Supply Voltage S I Supply Current S SVR Ripple Rejection INPUT STAGE R Input Resistance IN V Clipping Level CL C Control Range ...
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... I C BUS INTERFACE Data transmission from microprocessor to the TDA7429L and viceversa takes place through the 2 wires I BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected). 3.1 Data Validity As shown in fig. 5, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW ...
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... TDA7429L 3.3 Byte Format Every byte transferred on the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first. 3.4 Acknowledge The master (mP) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 7). ...
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... CHIP ADDRESS MSB LSB D95AU226A 5 EXAMPLES 5.1 No Incremental Bus The TDA7429L receives a start condition, the correct chip address, a subaddress with the MSB = 0 (no incre- mental bus), N-datas (all these datas concern the subaddress selected), a stop condition. Figure 9. CHIP ADDRESS MSB LSB D95AU306 5 ...
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... TDA7429L Table 6. Function Selection The first byte (subaddress) MSB <1> incremental bus; active incremental bus; <2> indifferent 0,1 Table 7. Input Attenuation Selection MSB INPUT ATTENUATION = 0 ~ -31.5dB 8/ LSB SUBADDRESS D0 0 INPUT ATTENUATION 1 CONTROL OUT L+R & SUBWOOFER 0 NOT USED 1 BASS & NATURAL BASE 0 MIDDLE & ...
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... Table 8. Out & (L+R) & Subwoofer Selection MSB Table 9. Bass Selection MSB TDA7429L LSB D0 SUBWOOFER CONTROL 0 SUBWOOFER ON 1 NOT ALLOWED 0 SUBWOOFER OFF 1 NOT ALLOWED OUT VAR FIX L+R CONTROL + --9 -10 -11 LSB BASS STEPS 0 -14 1 - 9/17 ...
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... TDA7429L Table 10. Speaker/Aux Att. R & L Selection MSB Notes INDIFFERENT 0.1 2. SPAEAKER/AUX ATTENUATION = 0dB to 79dB 10/ LSB SPEAKER/AUX ATT STEPS STEPS 0 -8 -16 -24 -32 -40 -48 -56 -64 -72 MUTE ...
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... Table 11. Middle & Treble Selection MSB TDA7429L LSB MIDDLE STEPS 0 -14 1 - TREBLE 2 dB STEPS -14 -12 - 11/17 ...
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... TDA7429L Table 12. Input/recout L & R Selection MSB Table 13. Power on reset BASS & MIDDLE TREBLE SURROUND & OUT CONTROL + (L+R) CONTROL SPEAKER/AUX ATTENUATION L & R INPUT ATTENUATION + (L+R) SWITCH NATURAL BASE INPUT 12/ 2dB 0dB OFF + FIX + MAX. ATTENUATION MUTE MAX. ATTENUATION + ON OFF IN1 LSB ...
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... Figure 13. Pin: L-IN, R-IN, L-IN2, R-IN2, L-IN3, R-IN3, L-IN4, R-IN4 V S 50K GND V REF Figure 14. Pin: CREF 20 A Figure 15. Pin: VAR-L, VAR D95AU233A GND Figure 16. Pin: LP1 GND HP1 D94AU200 TDA7429L 20K 42K 20K D95AU336 GND SW 30K Vref D95AU227 V S 10K D94AU211 13/17 ...
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... TDA7429L Figure 17. Pin: SCL, SDA GND D94AU205 Figure 18. Pin: MONO INPUT 50K GND Vref Figure 19. Pin: L-OUT, R-OUT, MONITOR-L, MONITOR-R, LTR OUTPUT, BASSO-L, BASSO-R, AUXOUT_L, AUXOUT_R GND 14/17 Figure 20. Pin: BASS-LI, BASS-RI, MIDDLE-LI BASS-LO BASS-RO,MIDDLE-LO,MIDDLE-RO Figure 21. Pin: BASS-LO, BASS-RO, MIDDLE BASS-LI,BASS-RI,MIDDLE-LI,MIDDLE-RI ...
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... TDA7429L OUTLINE AND MECHANICAL DATA SDIP42 (0.600" .015 0,38 Gage Plane e3 e2 SDIP42 15/17 ...
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... TDA7429L Table 14. Revision History Date Revision January 2004 June 2004 16/17 2 First Issue in EDOCS DMS 3 Changed the Style-sheet in compliance to the new “Corporate Technical Pubblications Design Guide” Description of Changes ...
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