TDA7429L STMicroelectronics, TDA7429L Datasheet - Page 5

IC PROCESSOR AUDIO 3BAND 42-SDIP

TDA7429L

Manufacturer Part Number
TDA7429L
Description
IC PROCESSOR AUDIO 3BAND 42-SDIP
Manufacturer
STMicroelectronics
Type
Audio Processorr
Datasheet

Specifications of TDA7429L

Applications
TV, HI-FI Systems
Mounting Type
Through Hole
Package / Case
42-SDIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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3
Data transmission from microprocessor to the TDA7429L and viceversa takes place through the 2 wires I
BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be
connected).
3.1 Data Validity
As shown in fig. 5, the data on the SDA line must be stable during the high period of the clock. The HIGH and
LOW state of the data line can only change when the clock signal on the SCL line is LOW.
3.2 Start and Stop Conditions
As shown in fig.6 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop
condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Table 5. Electrical Characteristcs (continued)
AUDIO OUTPUTS
MONITOR OUTPUTS
BUS INPUTS
Symbol
N
A
R
V
R
V
V
R
V
O(OFF)
V
MUTE
V
V
S
S
V
OCL
OUT
OUT
OCL
OUT
OUT
I
VEA
d
d
IN
DC
IH
IL
I
C
C
O
2
C BUS INTERFACE
DC Steps
Output Mute Condition
Input Impedance
Output Noise (OFF)
Distorsion
Channel Separation
Clipping Level
Output Resistance
DC Voltage Level
Distorsion
Channel Separation
Clipping Level
Output Resistance
DC Voltage Level
Input Low Voltage
Input High Voltage
Input Current
Output Voltage SDA
Acknowledge
Parameter
adjacent att. steps
Output Mute, Flat
BW = 20Hz to 20KHz
A
d = 0.3%
A
d = 0.3%
I
O
v
v
= 1.6mA
= 0 ; V
= 0 ; V
Test Condition
in
in
= 1V
= 1V
rms
rms
Min.
+70
21
70
20
70
20
-3
-5
2
2
3
Typ.
0.01
0.01
100
2.5
3.8
2.5
4.5
30
90
40
90
50
0
4
5
Max.
0.1
0.1
0.4
39
70
85
+5
3
1
TDA7429L
Vrms
Vrms
Unit
mV
mA
K
V
V
dB
dB
dB
%
%
V
V
V
V
V
rms
rms
5/17
2
C

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